Courses

Explore a novel approach to secure track verification for mobile nodes presented at the 2015 IEEE Symposium on Security & Privacy. Delve into the innovative method that leverages inherent mobility to constrain attackers when spoofing consecutive location updates. Learn how this lightweight solution can securely verify 2-D tracks with three verifiers and 3-D tracks with four verifiers, even in the absence of noise. Discover the advantages of this passive approach, which eliminates the need for time synchronization among verifiers, secret verifier locations, or specialized hardware. Examine the solution's effectiveness in a real-world air traffic monitoring scenario, where it achieves impressive false positive and negative rates. Gain insights into the potential applications of this technology for large-scale deployments in various mobile tracking systems.

Learning physical verification for freshers and experienced professionals. What you'll learn: Understand physical verification's essential conceptsHelp developing basics for physical verfication interview preparationUseful for physical design engineers also to understand sign off related conceptsProvide indepth learning to tackle problems irrespective of experience level. Whether you are a fresher or experienced professional who wants to refresh your concepts, this is the right place for you to start. Lectures are organised topic based so that each lecture is more or less independent of each other, so that it is also possible to start a lecture in between and understand all the concepts taught there. You will gain a better understanding of DRC,LVS, ERCand multiple other topics that are essential to physical verification. Whether you are looking for job opportunities in the industry or have an interview and want to prepare for it, you can start with this course. Physical designers who want to understand this sign off domain can also benefit from this course. Quizes are provided between lectures so that students can refresh the concepts learnt in the lectures and if any concept is not clear, the equivalent lecture can be revisited. Few real cases encountered by the lecturer as a physical verification engineer is also included in the course, so that the students can benifit from this course. Basic understanding of electronics is required for understanding the course. The students should brush up on fundamentals, like what is a resistor, capacitor, transistor, diode e.t.c, so as to make best use of the course. Happy learning!!

Explore a novel method for verifying productivity in functional programs generating co-inductive data structures. Learn how this approach transforms co-inductive data structures into functions, reducing the productivity verification problem to a termination problem for call-by-name higher-order functional programs. Discover the formalization and correctness proof of this transformation, as well as its implementation in an automated productivity checker. Gain insights into co-inductive types, automated program verification, and higher-order functional programs through this 23-minute video presentation from the PEPM 2024 conference.

Ensuring the accuracy of AI-generated content is critical. In this course, Fact Verification with RAGs, you’ll learn to implement a system that verifies AI-generated content using NLP techniques. First, you’ll explore how to retrieve relevant data from a dataset using Python and the pandas library. Next, you’ll discover how to use pre-trained sentence transformers to generate embeddings for textual data. Finally, you’ll learn how to implement a zero-shot classification model to assess the veracity of claims. When you're finished with this course, you’ll have the essential skills and knowledge of retrieval-augmented generation needed to ensure the accuracy and reliability of AI-generated content using Python common libraries.

A comprehensive course that teaches System on Chip design verification concepts and coding in SystemVerilog Language What you'll learn: Learn the important concepts in SOC/ASIC/VLSI design verification flowLearn the System Verilog language for Functional Verification usageBe ready and qualified for a Verification job in semiconductor industryUdemy Certification on successful course completionBe able to code, simulate and verify SystemVerilog Testbenches This course introduces the concepts of System on Chip Design Verification with emphasis on Functional Verification flows and methodologies. The course also teaches how to code in SystemVerilog language - which is the most popular Hardware Description Language used for SOC design and verification in semiconductor industry. The course is organised into multiple sections and each uses short video lectures to explain the concepts. After every few other lectures -lab exercises are provided and students will be guided to practically code, simulate and verify using a free browser based Simulator and Waveform viewer. Quizzes are also added to test the students knowledge and progress. Part 2 of the course covering advanced and industry standard verification methodologies like OVM//UVM will follow based on feedback on this course

Explore a concise preview of the Automated Verification session at POPL'24, presented by Viktor Kunčak. Gain insights into the latest advancements and key topics to be discussed in this 10-minute conference talk, offering a glimpse into the cutting-edge research and developments in the field of automated verification within programming languages and systems.

Step by Step Guide from Scratch What you'll learn: Fundamentals of SystemVerilog for Verification of RTLFundamentals of OOP's for FPGA EngineerFundamentals of Constraint Random Verification MethodologyFundamentals of Layered Testbench architectureCreating Generator, Driver, Monitor, Scoreboard, Environment ClassesArray, Queue, Dynamic array, Task, and Methods of SVInterprocess Communication and Randomization of SV VLSI Industry is divided into two popular branches viz. Design of System and Verification of the System. Verilog, VHDL remain the popular choices for most Design Engineers working in this domain. Although, preliminary functional verification can be carried out with Hardware Description Language. Hardware Description language possesses limited capabilities to perform code coverage analysis, Corner cases testing, etc and in fact sometimes it becomes impossible to perform this check with HDL's. Hence Specialized Verification languages such as SystemVerilog start to become the primary choice for the verification of the design. The SystemVerilog Object-oriented nature allows features such as Inheritance, Polymorphism, etc. adds capabilities of finding critical bugs inside design that HDL simply cannot find. Verification is certainly more tricky and interesting as compared to designing a digital system and hence it consists of a large number of OOP's Constructs as opposed to Verilog. SystemVerilog is one of the most popular choices among Verification Engineer for Digital System Verification. This Journey will take you to the most common techniques used to write SystemVerilog Testbench and perform Verification of the Chips. The course is structured so that anyone who wishes to learn about System Verilog will able to understand everything. Finally, Practice is the key to become an expert.

Explore the emerging discipline of continuous verification in complex socio-technical ecosystems through this 53-minute conference talk from YOW! 2020. Delve into how systems drift into failure rather than experiencing sudden catastrophic events. Learn how to sensitize yourself and your colleagues to the drifting safety boundaries of your systems, and discover how this awareness can inform your work. Gain insights into moving beyond traditional chaos engineering approaches to better understand and manage the complexities of modern technological environments. Examine the implications for incident response, system design, and organizational practices in software development and operations.

Explore a comprehensive lecture on the classical verification of quantum computations delivered by Urmila Mahadev from UC Berkeley. Delve into the challenges of quantum computation, comparing classical and quantum computers, and examine verification methods through interactive proofs. Learn about relaxations and verification using post-quantum cryptography, focusing on core primitives and superposition creation. Understand the verification outline, including Hadamard and standard basis measurements, and the measurement protocol definition and soundness. Investigate the quantum analogue of NP and verification with a quantum verifier. Study the measurement protocol construction, testing, and delegation of Hadamard and standard basis measurements. Gain insights into soundness intuition, hardcore bit properties, and the process of proving soundness in the measurement protocol.

Learn how classical computers can verify the correctness of quantum computations in this 51-minute conference talk by Yael Kalai from MIT, exploring the theoretical foundations and practical implications of ensuring quantum computational results can be trusted through classical verification methods.

Explore a comprehensive talk on Prusti, a deductive verification tool for Rust, presented by Alex Summers. Delve into the intricacies of this powerful tool designed to enhance the reliability and correctness of Rust programs through formal verification techniques. Gain insights into how Prusti leverages Rust's ownership system to provide strong correctness guarantees and learn about its potential applications in developing robust and error-free software. Discover the benefits and challenges of integrating deductive verification into the Rust ecosystem and understand how this approach can complement Rust's existing safety features.

Explore LLVM improvements aimed at enhancing verification processes in this 28-minute conference talk by Alan Jowett. Gain insights into the latest advancements and techniques implemented within the LLVM framework to bolster code verification capabilities, potentially leading to more robust and reliable software development practices.

Explore groundbreaking research presented at the 19th Conference on the Theory of Quantum Computation, Communication and Cryptography (TQC 2024) that addresses the challenge of classical verification in quantum learning systems. Delve into a novel framework that enables classical clients to reliably delegate learning tasks to quantum servers, focusing specifically on agnostic learning parities and Fourier-sparse functions with uniform input marginal distributions. Learn about the innovative "mixture-of-superpositions" quantum examples model and discover how classical agents can harness quantum computing power through interaction with quantum entities, even without direct quantum capabilities. Understand the limitations and potential of quantum data in learning tasks, including scenarios where quantum approaches may not offer sample complexity improvements over classical methods. The presentation demonstrates how classical verification systems can bridge the accessibility gap in quantum learning, making quantum advantages available to a broader user base despite limited quantum hardware availability.

Explore the open-source command line tool TerraHash in this 26-minute conference talk by Ned Bellavance. Learn how to ensure consistent and validated experiences when using modules from remote sources in Terraform code. Discover how TerraHash creates a module lock file for each remotely sourced module, including version and hash information, similar to the provider lock file. Understand the challenges of module verification, how TerraHash addresses these issues, and ways to integrate the tool into your workflow. Gain insights into improving collaboration and maintaining consistency in Terraform configurations across teams.

Unified Power Format (IEEE1801 standard) Design and Verification Techniques What you'll learn: What does UPF mean and why is it required?UPF Low Power DesignUPF Low Power VerificationLearn a new skill that will help prepare for a Job in the Semiconductor Industry Exhaustive course spanning across 6+ hours of on-demand video lectures.Comprises of 4 major sub-sections:Need of UPF and UPF Basics (~1 hour 1 min)+ VLSI Design Phases +RTL Simulation Vs Power Aware UPF Simulation + UPF BasicsUPF Power Aware Design (~2 hours 51 mins)+ Power Domains + Supply Nets/Ports – Power Supply Network + Supply Sets – Power Supply Network + Power Switches + Power State Table + Level Shifters + Isolation Cells + Input Vs Output Isolation Cells + Retention Cells + Flat UPF Vs Hierarchical UPF + UPF Evolution 1.0 Vs 2.0 Vs 2.1 Vs 3.0UPF Power Aware Verification (~2 hours 4 mins)+ Popular Power Saving Techniques + Static Verification + Dynamic Verification 1 – Controlling Power Supplies + Dynamic Verification 2 – Simstate Modelling + Dynamic Verification 3 – Power Coverage + Dynamic Verification 4 – Low Power AssertionsMiscellaneous Concepts (~11* mins)+ Instrumentation Vs Instantiation + Hard Macros and Liberty Files* New lectures might be added based upon popular user feedback and request.

Explore a 20-minute conference talk from PLDI 2023 that introduces a novel framework for incremental and complete verification of deep neural networks (DNNs). Learn about IVAN, a tool that achieves significant speedups in verifying challenging MNIST, CIFAR10, and ACAS-XU classifiers compared to state-of-the-art baselines. Discover how this approach improves efficiency when verifying updated DNNs, addressing the limitations of existing complete verifiers that require full re-verification. Gain insights into the innovative theory, data structures, and algorithms behind this framework, which aims to enhance the trustworthiness and robustness of DNNs in various applications.

Join Yannick Forster from INRIA in this hour-long talk presented at the Simons Institute for the Theory of Computing and SLMath Joint Workshop on AI for Mathematics and Theoretical Computer Science. Explore cutting-edge research at the intersection of artificial intelligence, mathematics, and theoretical computer science as Forster shares insights from his work at INRIA.

Build the skills needed to outsmart cyber threats. This Nanodegree teaches you how to secure infrastructure, assess vulnerabilities, and apply top industry practices to protect your organization from digital attacks.

The Empathetic Engineer is a course that will enhance your capacity to harness your technology and problem-solving skills to deliver high impact, innovative solutions that address compelling social and environmental needs. It is a course that puts people, planet and nature at its core, enabling you to generate new levels of value for the markets or communities you serve, without compromising our world today or in the future. There has never been a more exciting time for engineers to make an impact at scale. We have a perfect storm of need and technological capability. We have the immense challenge of climate change, alongside a desperate need to create a more sustainable and equitable model of consumption and production. But we are also at the top of a wave of innovation, the likes of which have not been seen for around 120 years, where many distinct areas of technological progress are transforming our capacity to address the immense challenges we face. The challenges we face are systemic and our responses must be, too. Week by week, the course will take you through the 6 phases of the process we use, from first scoping a challenge you want to focus upon, researching it, drawing on those insights to generate a clear set of goals and ambitions, igniting your creative capacity to develop novel and exciting concepts, selecting, testing and refining them along with the business model before implementing an innovative solution, that addresses a compelling need. At the end of the course, you should be able to: Demonstrate theoretical and practical understanding of the different stages of the empathetic engineering approach in the context of engineering design projects. Analyse the socio-cultural, environmental, and economic factors that need to be considered in the given context. Apply the principles, methods and tools to an engineering design project to deliver more effective and measurable outcomes. Optionally, develop a project proposal that spans technological, socio-cultural, environmental and economic systems, including how the proposal creates and captures value for each of the relevant stakeholders. That is our goal, and we look forward to going on this journey together.

As AI continues to reshape industries, demand is rising for professionals who can develop intelligent solutions that integrate seamlessly into cloud-based platforms. The AI Engineer program, developed by Microsoft and hosted on edX, equips learners with the technical knowledge and practical skills to build and deploy AI solutions using Azure AI services. Across three in-depth courses, you’ll begin with an introduction to Azure’s AI capabilities and progress to more advanced applications, including natural language processing, computer vision, and knowledge mining. You’ll also learn how to use services such as Azure OpenAI, Cognitive Services, and Azure Machine Learning to build enterprise-grade AI solutions. This program is ideal for software developers, cloud engineers, and data professionals looking to deepen their expertise in cloud-based AI. With hands-on labs, real-world use cases, and a focus on responsible AI design, this program sets you up for success in AI engineering roles and serves as a strong foundation for Azure AI certification paths.