Principal Circuit Design Engineer

Collaborate with SoC designers to develop Memory SRAM and Register file solutions to difficult PPA challenges. Work with internal and external process technology teams to understand and exploit advanced process DTCO knobs. Devise methodologies for statistical analysis and timing/power/EMIR characterization. Run quality assurance checks on IP collateral. Develop IP and post-silicon characterization plans for inclusion on advanced process technology testchips. Develop scripting automation for flows. Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR equivalent experience. This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate's citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable. 6+ years of experience in SRAM or Register file design. 6+ years of experience in timing, power, EMIR characterization. Experience in SRAM and Register File design in advanced process technologies. Understanding of SRAM write and read assist techniques. Understanding of process technology and DTCO. Understanding of layout and provide guidance to layout design. Experience in yield and reliability. Experience in providing technical guidance to other engineers and multitasking across multiple SoC programs. Scripting experience in PERL, Python, or TCL. Working knowledge of and experience in utilizing AI for circuit design tasks. Ability to concisely communicate design value propositions and risks. Effective debug skills.