Skip to main content
Tallo logoTallo logo

Senior Staff Analog Circuit Design Engineer - SerDes

Job

OREGON EMPLOYMENT DEPARTMENT

Hillsboro, OR (In Person)

Part-Time

Posted 1 week ago (Updated 4 days ago) • Actively hiring

Expires 6/23/2026

Apply for this opportunity

This job application is on an outside website. Be sure to review the job posting there to verify it's the same.

Review key factors to help you decide if the role fits your goals.
Pay Growth
?
out of 5
Not enough data
Not enough info to score pay or growth
Job Security
?
out of 5
Not enough data
Calculating job security score...
Total Score
80
out of 100
Average of individual scores

Were these scores useful?

Skill Insights

Compare your current skills to what this opportunity needs—we'll show you what you already have and what could strengthen your application.

Job Description

Job Listing ID:
4493588
Job Title:
Senior Staff Analog Circuit Design Engineer -
SerDes Application Deadline:
Open Until Filled
Job Location:
Hillsboro
Date Posted:
05/16/2026
Hours Worked Per Week:
Not Provided Shift:
Not Provided Duration of Job:
Either Full or Part Time, more than 6 months You may contact this employer directly. (Obtain the contact information to print or add to your jobs.)
Job Summary:
Job Details:
Job Description:
The Role and Impact We are seeking a highly motivated and skilled?

Senior Staff Analog Circuit Design Engineer to contribute to the design, implementation, and validation of advanced analog and mixed-signal circuits for high-speed (112G and 224G) SerDes applications. In this role, you will participate in the definition, design, and verification of high-performance analog blocks and subsystems, collaborating closely with system architects, digital designers, and layout engineers. The ideal candidate is self-driven, detail-oriented, and passionate about analog design in high-speed communication systems. Key Responsibilities Design and implement advanced analog and mixed-signal circuits for 112G and 224G SerDes applications Participate in the definition, design, and verification of high-performance analog blocks and subsystems Engage in technical discussions and contribute to design reviews Conduct post-silicon validation and performance optimization Provide guidance to layout engineers and mentor junior analog designers Collaborate across disciplines with system architects, digital designers, and layout teams Develop innovative designs as part of a highly experienced SerDes team focused on next-generation high-speed interconnect solutions Core Competencies Good communicationand documentation skills, with a collaborative and proactive work style Strong analytical thinking, hands-on debugging skills, and an eagerness to learn and shareexpertisewithin the team Demonstrated ability to work effectively in cross-functional teams and contribute to technical reviews.
Excellent Communication Skills Qualifications:
The Minimum qualifications are required to be initially considered for this position. Minimum qualifications listed below would be obtained through a combination of industry relevant job experience, internship experience and / or schoolwork/classes/research. The preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications Bachelor's degree in Electrical Engineering, Electronics Engineering, orinaSTEMrelated field 2+ years of experience in analog/mixed-signal circuit design for high-speed SerDes or similar applications Experience in one or more of the following domains: PLL, CDR, CTLE, DFE, ADC,LDO,RefGen,or Transmitter (TX) design Experience withcore analog design principles, including noise, linearity, matching, and stability Experience with advancedFinFETCMOS process technologies Experiencewith analog design and simulation tools such as Cadence Virtuoso/ADE, HSPICE, or equivalent Preferred Qualifications Ph.D. in Electrical Engineering, Electronics Engineering, orinaSTEMrelated field Experience withof transmitter and receiver design, CDR loops, and equalization techniques Experience withnext-generation high-speed standards such as PCIe 6.0, 800G Ethernet, or JESD Experience with high-speed communication standards such as PCIe (Gen4/Gen5) and Ethernet (100G/400G) Experience with Verilog-A modeling, MATLAB simulations, and automation scripting (e.g., Python,Tcl) Experiencewith signal integrity concepts, channel modeling, and system-level link analysis
Job Type:
Experienced Hire Shift:
Shift 1 (United States of America)
Primary Location:
US, Calif...
Job Classification:
Electronics Engineers, Except Computer Access our statewide or regional occupation report for more information about wages, employment outlooks, skills, training programs, related occupations, and more. Compensation
Salary:
Not Provided Job Requirements
Experience Required:
 See Job Summary
Education Required:
None
Minimum Age:
N/A Gender:
N/A