Staff DFT Architecture & RTL Engineer, AI Hardware
Job
Tesla Motors, Inc.
Palo Alto, CA (In Person)
$220,000 Salary, Full-Time
Review key factors to help you decide if the role fits your goals.
Pay Growth
?
out of 5
Not enough data
Not enough info to score pay or growth
Job Security
?
out of 5
Not enough data
Calculating job security score...
Total Score
79
out of 100
Average of individual scores
Skill Insights
Compare your current skills to what this opportunity needs—we'll show you what you already have and what could strengthen your application.
Job Description
Staff DFT Architecture & RTL Engineer, AI Hardware Tesla Motors, Inc. 128,000
This role is located in Palo Alto, CA or Austin, TX. If you are passionate about pushing the boundaries of low-precision arithmetic, quantization techniques, and hardware acceleration for machine learning, this is your opportunity to contribute to revolutionary AI hardware. Our Silicon Engineering team designs highly testable SoCs that meet quality and coverage targets from day one of silicon. As a Staff DFT Arch & RTL Engineer, you will define the comprehensive DFT architecture and own RTL insertion of all test structures
- 312,000 USD paid holidays, flex time, 401(k) United States, California, Palo Alto Apr 21, 2026 What to Expect The Tesla AI Hardware team is at the forefront of revolutionizing artificial intelligence throughcutting-edgehardware innovation.
ASIC RTL
Design Engineer with a specialization in the mathematical and computational aspects of custom AI accelerators. You will focus on designing high-performance, power-efficient RTL for math-intensive components that power our AI training and inference systems. This role emphasizesexpertisein tensor operations, matrix computations, and optimized data paths for advanced AI workloads.This role is located in Palo Alto, CA or Austin, TX. If you are passionate about pushing the boundaries of low-precision arithmetic, quantization techniques, and hardware acceleration for machine learning, this is your opportunity to contribute to revolutionary AI hardware. Our Silicon Engineering team designs highly testable SoCs that meet quality and coverage targets from day one of silicon. As a Staff DFT Arch & RTL Engineer, you will define the comprehensive DFT architecture and own RTL insertion of all test structures
- from scan and MBIST to JTAG and OCC
- setting the foundation for full-chip test coverage and bring-up readiness. What You'll Do Define and implement full DFT architecture for complex SoC designs
- ISTC, IJTAG, scan, MBIST, BISR, and JTAG boundary scan (IEEE 1149.1 / 1149.6) Drive RTL insertion and integration ofTessent-based DFT structures
- ISTC, SSN, OCC, compression logic, and memory BIST Understanding and familiarity of hybrid bond testing Perform CDC/RDC checks usingSpyGlass,JasperGold, or Questa CDC
- identifyand resolve clock and reset domain crossing violations Execute static verification flows
- LINT checks, coding standard compliance, and design rule verification to ensure RTL quality and synthesizability Own
JTAG/1500/1687
network architecture- implement BSDL, ICL, and PDL specifications Define and resolve DFT rule violations to ensure DFT-friendly RTL across the design Leverage agentic AI flows to automate DFT rule checking, RTL insertion validation, and coverage analysis What You'll Bring Degree in Electrical Engineering, Computer Engineering, or related field, or equivalent experience 10+ years of DFT architecture and RTL insertion experience on complex SoCs Expert-levelproficiencywith SiemensTessentsuite (Shell,TestKompress,MemoryBIST) Deepexpertisein ISTC, SSN, OCC, compression logic, and memory BIST architectures Strong command of IEEE 1149.
- BSDL, ICL, and PDL Hands-on CDC/RDC analysis usingSpyGlass,JasperGold, or Questa CDC Ability to use agentic AI flows to scale DFT insertion and validation workflows Preferred DFT architecture ownership on server-class or AI accelerator SoCs Experience with hierarchical DFT for multi-die or 3D IC designs Exposure to low-power DFT
- multi-Vddand state retention considerations Compensation and Benefits Benefits Along with competitive pay, as a full-time Tesla employee, you are eligible for the following benefits at day 1 of hire: Medical plans > plan options with $0 payroll deduction Family-building, fertility, adoption and surrogacy benefits Dental (including orthodontic coverage) and vision plans, both have options with a $0 paycheck contribution Company Paid (Health Savings Accounts) HSA Contribution when enrolled in the High-Deductible medical plan with HSA Healthcare and Dependent Care Flexible Spending Accounts (FSA) 401(k) with employer match, Employee Stock Purchase Plans, and other financial benefits Company paid Basic Life, AD&D Short-term and long-term disability insurance (90 day waiting period) Employee Assistance Program Sick and Vacation time (Flex time for salary positions, Accrued hours for Hourly positions), and Paid Holidays Back-up childcare and parenting support resources Voluntary benefits to include: critical illness, hospital indemnity, accident insurance, theft & legal services, and pet insurance Weight Loss and Tobacco Cessation Programs Tesla Babies program Commuter benefits Employee discounts and perks program Expected Compensation $128,000•$312,000/annual salary + cash and stock awards + benefits Pay offered may vary depending on multiple individualized factors, including market location, job-related knowledge, skills, and experience.
Similar remote jobs
International Foundation of Employee Benefit Plans
Brookfield, WI
Posted2 days ago
Updated1 day ago
Similar jobs in Palo Alto, CA
Swickard Palo Alto II, LLC d/b/a Mercedes-Benz of Palo Alto
Palo Alto, CA
Posted2 days ago
Updated1 day ago
Stanford Health Care
Palo Alto, CA
Posted2 days ago
Updated1 day ago
Similar jobs in California
W3global
Los Angeles, CA
Posted2 days ago
Updated1 day ago