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Analog Mixed Signal IP Integration Engineer

Job

Apple

Beaverton, OR (In Person)

Full-Time

Posted 3 weeks ago (Updated 23 hours ago) • Actively hiring

Expires 7/4/2026

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Job Description

Analog Mixed Signal IP Integration Engineer Apple - 4.1 Beaverton, OR Job Details 4 hours ago Qualifications 7 years Requirements specification Bachelor's degree in electrical engineering Writing skills Engineering Master's degree Verilog SoC Master's degree in electrical engineering Simulation systems Senior level Electrical Engineering Cross-functional collaboration Communication skills Cross-functional communication Full Job Description In this highly visible role, you will support the integration of 3rd party IP in the SOCs developed by Apple. Your job is to verify that the IP deliverables are meeting Apple's high quality standards and get flawlessly integrated. The role involves working closely with different cross-functional teams within Apple as well as with external vendors. Occasional travel might be required. At Apple, we work every single day to craft products that enrich people's lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? We have an opportunity for a forward-thinking and especially motivated Analog Mixed Signal IP Integration Engineer! As a member of our dynamic group, you will have the rare and great opportunity to work on upcoming products that will delight and encourage millions of Apple's customers every day! Description Define and specify deliverable requirements for IP provided by external vendors Driving discussions with vendors regarding these requirements, their design and verification methodology Review IP quality on incoming deliverables Provide support to Apple SOC front-end and back-end design teams for integrating the IP Preferred Qualifications Experience in RTL design, verification or integration Deep knowledge and experience with front-end tools such as simulation, synthesis, lint, logic equivalence, static timing analysis, CDC, RDC, and UPF Familiarity with SOC design flow and verification methodologies Good understanding of DFT requirements for SOCs Experience writing Verilog, SystemVerilog, SVA hardware description languages Experience with Verilog modeling and model validation is a plus Experience with standards like PCI Express, MIPI, USB or DisplayPort is a plus Excellent written and verbal communication skills Strong initiative and ownership of responsibilities, productive, able to meet aggressive deadlines Minimum Qualifications BSEE/MSEE and 7+ years industry related experience.","internalDetails":null