ASIC Digital Design, RTL - 16908

We Are:

At Synopsys, we drive innovations that shape how the world connects and lives. Our technology powers chip design, verification, and IP integration. Join us to transform the future through continuous technological innovation.

You Are:

You are an experienced digital designer with deep expertise in high-speed interconnects. You thrive in collaborative, global teams and enjoy mentoring others. Your technical skills and problem-solving mindset help shape industry-leading solutions. You're eager to contribute to cutting-edge chiplet systems and advance your career in a dynamic environment.

What You'll Be Doing:

Designing high-performance digital logic for Die to Die IP Collaborating across teams on PHY and controller designs Optimizing IP for performance, power, and area Participating in the full Hard IP design cycle Providing technical guidance to junior engineers Staying current with industry trends

The Impact You Will Have:

Driving world-class D2D IP development Shaping semiconductor technology's future Ensuring high-quality IP delivery Enhancing Synopsys IP adoption Mentoring engineers globally Strengthening Synopsys' leadership

What You'll Need:

Expertise in SerDes, DDR/HBM, or UCIe PHY Hard IP design experience Proficiency in SystemVerilog Strong RTL-to-gate design flow knowledge Excellent problem-solving and communication skills

Who You Are:

Collaborative and inclusive Analytical and detail-oriented Effective communicator Mentor and leader

The Team You'll Be A Part Of:

Join a diverse, world-class engineering team focused on high-speed Die to Die IP innovation in a global, matrixed environment.

Rewards and Benefits:

We offer comprehensive health, wellness, and financial benefits. Your recruiter will share more about salary and perks during the hiring process.