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Senior Assembly Design Kit (ADK) Development Engineer (2.5D/3D Advanced Packaging)

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Rapidus Corporation US

Albany, NY (In Person)

Full-Time

Posted 2 days ago (Updated 7 hours ago) • Actively hiring

Expires 6/30/2026

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Job Description

Senior Assembly Design Kit (ADK) Development Engineer (2.5D/3D Advanced Packaging) at Rapidus Corporation US Senior Assembly Design Kit (ADK) Development Engineer (2.5D/3D Advanced Packaging) at Rapidus Corporation US in Albany, New York Posted in about 20 hours ago.
Type:
full-time
Job Description:
Position Overview We are seeking a highly skilled ADK (Assembly Design Kit) Development Engineer to lead the creation, integration, and validation of design enablement infrastructure for 2.5D/3D advanced packaging , including chiplet-based architectures, silicon interposers, and heterogeneous integration technologies. This role is central to enabling next?generation multi?die systems by delivering robust ADKs that bridge design, manufacturing, and EDA ecosystems. You will collaborate closely with packaging R D, process integration, EDA vendors, IP partners, and customer design teams across multiple global sites.
Locations:
Albany, NY (USA) / Santa Clara, CA (USA) / Tokyo (Japan) / Chitose (Japan)
Employment Type:
Full-time Department:
Design Enablement / Advanced Packaging Technology About Rapidus Rapidus Corporation, founded in 2022, is Japan-led initiative to build a world-class advanced logic semiconductor foundry. With a bold vision to accelerate innovation, we are pioneering cutting-edge logic semiconductor research, development, design, and manufacturing to transform the global semiconductor industry. Key Responsibilities Develop and maintain Assembly Design Kits (ADKs) for 2.5D/3D packaging technologies, including: Package assembly rules DRC/LVS rule decks Bump/TSV/RDL design constraints Thermal/mechanical design guidelines Multi-die floorplanning and connectivity models Define and implement design methodologies for chiplet-based and heterogeneous integration flows. Work with EDA vendors (Cadence, Synopsys, Siemens) to enable: 3DIC design flows System-level co-design (package + die) Parasitic extraction and signal/power integrity analysis Validate ADK quality through: Reference design creation Automated regression testing Cross-tool consistency checks Collaborate with process and packaging engineering teams to translate manufacturing constraints into design rules. Support customer design teams by providing technical guidance, documentation, and issue resolution. Drive continuous improvement of ADK architecture, automation, and release processes. Required Qualifications Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Materials Science, or related field. 5+ years of experience in advanced packaging , 3DIC , package design , or design enablement .
Strong knowledge of:
2.5D/3D packaging technologies (interposers, chiplets, hybrid bonding, TSV, RDL) Package design flows using Cadence SIP/Allegro, Synopsys 3DIC Compiler, or Siemens Xpedition DRC/LVS rule development and verification Hands-on experience with scripting languages (Python, Tcl, SKILL, etc.) for automation. Understanding of SI/PI/thermal analysis methodologies. Excellent communication skills and ability to work with cross-functional global teams. Preferred Qualifications Experience developing PDKs/ADKs or design kits for foundry or OSAT environments. Knowledge of heterogeneous integration standards (UCIe, BoW, HBM). Familiarity with chiplet architecture and multi-die system design. Experience with packaging manufacturing processes (RDL, micro-bump, hybrid bonding). Ability to lead technical discussions with customers and ecosystem partners. What We Offer Opportunity to shape the design ecosystem for next-generation 2.5D/3D semiconductor technologies. Collaboration with world-class R D teams across the US and Japan. Competitive compensation and benefits. A fast-moving environment where innovation and technical leadership are valued. Benefits Comprehensive Health, Dental and Vision coverage, fully at company's expense (no deductibles) 401k with no employer match