Job Description
Job Title:
Hardware Reliability Engineer Location:
Sunnyvale, CA Duration:
6 months Description As a Hardware Reliability Engineer, you will engage with experienced cross-disciplinary staff and outside partners to drive key aspects of product definition, execution and test. You must be responsive, flexible and able to succeed within an open collaborative peer environment. You will be responsible for the test validation of our devices. You should have a good understanding of Reliability statistics/Reliability tests and/or solid understanding of electronic and electrical products to influence design for reliability to: Identify and validate product/IC risks, including but not limited to electrical system, mechanical system, RF system, acoustic system, and work with design teams to mitigate them Define test methodology and test coverage to assure IC/product reliability Perform reliability prediction of failure mechanisms on products/ICs under development and products in the field Demonstrated ability in identifying and validating semiconductor component risks working cross-functionally with various domains including ATE testing, Silicon validation, Design (Silicon/Package), and SW teams. Experience with electrical stress testing, ESD testing, environmental stress testing, fatigue testing, vibration and shock testing Basic Qualifications 5+ years of working in mechanical engineering or equivalent experience Strong understanding of Integrated circuit design, fabrication, functioning , and product integration. Knowledge of semiconductor failure mechanisms, IC/package/board reliability, semiconductor standards such as JEDEC, Electrical bench and stress testing Experience with Failure analysis techniques such as SEM, FIB, CSAM, surface analysis, thin film analytical tools, cross sectioning, x-ray, dye and pry. Preferred Qualifications Master's degree in mechanical engineering, electrical engineering, material science, physics or equivalent, or PhD and 5+ years of industry or academic research experience Demonstrated experience using thermal imaging systems (FLIR or equivalent) for IC hot spot detection, board-level thermal mapping, and root cause analysis of thermal-induced failures in semiconductor packages 3+ years hands-on experience with digital optical microscopy (Keyence VHX series or equivalent) for microcrack detection, surface defect analysis, and package-level failure characterization at advanced technology nodes (7nm or below preferred) Strong understanding of SoC package architectures, failure modes (die cracks, delamination, wire bond failures), and experience with both 1P and 3P IC failure analysis workflows Proven ability to document FA findings with high-quality imaging, prepare technical reports, and collaborate with cross-functional teams (design, reliability, manufacturing) to drive corrective actions
