Fall 2026 Co-Op - Design Verification Engineer

Fall 2026 Co-Op - Design Verification Engineer Cirrus Logic - 4.0 Chandler, AZ Job Details Internship 1 day ago Qualifications Digital design Full Job Description For over four decades, Cirrus Logic has been propelled by the top engineers in mixed-signal processing. Our rockstar team thrives on solving complex challenges with innovative end-user solutions for the world's top consumer brands. Cirrus Logic is also known for its award-winning culture, which was built on a foundation of inclusion and fairness, meaningful community engagement, and delivering enjoyable employee experiences at every turn. But we couldn't do it without our extraordinary workforce - and that's where you come in. Join our team and help us continue to make Cirrus Logic an exceptional place to grow your career! We are seeking highly motivated interns to join our Mixed-Signal Verification Engineering team to support the functional verification of industry-leading mixed-signal products. This internship offers a unique opportunity to work closely with digital and analog designers, applications engineers, and manufacturing test teams to ensure robust product performance through both pre-silicon verification and post-silicon validation. This internship will take place in Chandler, Arizona during the Fall 2026 semester over the course of a 12 week long internship working a full-time schedule. Responsibilities Assist in verification planning and strategy development. Support testbench creation, maintenance, and enhancement. Contribute to failure analysis, debug, and resolution efforts. Help with coverage analysis and population to ensure thorough verification of mixed-signal products. Work on digital/mixed-signal modeling, directed and constraint-random test generation, and verification flow development. Required Skills and Qualifications Currently pursuing a MS or PhD in Electrical Engineering or a related field. Strong background in Hardware Description Languages (HDLs) such as Verilog or VHDL. Familiarity with Hardware Verification Languages (HVLs) like SystemVerilog/UVM, Vera, or e. Solid understanding of digital design fundamentals and verification methodologies. #LI-Hybrid Cirrus Logic follows a 2+ day in-office work schedule but interns should expect to be in the office more often, up to 5 days per week, based on business needs and team preference. Interns must be based within commutable distance of the work location listed on the job posting, or willing to relocate prior to beginning their internship with Cirrus Logic. Export control restrictions based upon applicable laws and regulations would prohibit candidates who are nationals of certain embargoed countries from working in this position without Cirrus Logic first obtaining an export license. Candidates for this role must be able to access technical data without a requirement for an export license. We are unable to sponsor or obtain export licenses for this role. Cirrus Logic strives to select the best qualified applicant for any opening. Different approaches, ideas and points of view are both valued and respected. Employment decisions are made on the basis of job-related criteria without regard to race, color, religion, sex, national origin, age, protected veteran or disabled status, genetic information, or any other classification protected by applicable law.