Principal Emulation Engineer

Principal Emulation Engineer Marvell Semiconductor, Inc. United States, California, Irvine 15485 Sand Canyon Avenue (Show on map) May 05, 2026 About Marvell Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Custom Compute and Storage (CCS) Business Unit closely collaborates with strategic customers in the development of advanced and highly complex SoCs, from architecture and design all the way through layout, packaging, prototype validation and production ramp up. The Emulation Center of Excellence (CoE) team is key part of this group, with global ownership and responsibility for delivering emulation infrastructure, validating the design on emulation and drive left shift of SW and post-silicon readiness for all of CCS products. As part of the Emulation CoE team, you will drive the emulation strategy, vendor platform enablement, testplan execution for a high-quality design tape-out. What You Can Expect In this role,

• Lead the development of complex SubSystem emulation models, including design integration, environment setup, compilation, and debug across industryleading platforms (e.g., Veloce, ZeBu, Palladium).
• Drive emulation bringup activities, including clock/reset sequencing, firmware boot, and system validation using presilicon hardware models.
• Create and execute emulation test plans to support verification, performance analysis, software development, and system validation needs across multiple teams.
• Collaborate closely with RTL design, verification, and firmware teams to define requirements, develop accurate hardware models, and ensure seamless integration into the emulation environment.
• Debug complex SoC and subsystem issues across RTL, firmware, emulation platforms, and toolchain interactions.
• Optimize emulation performance, including model partitioning, timing, and runtime efficiency.
• Automate flows and improve productivity through scripting (Python, Perl, Tcl, shell) and tooling enhancements.
• Interface with EDA vendors (Synopsys, Cadence, Siemens) to evaluate tool capabilities, resolve technical issues, and drive feature improvements. What We're Looking For
• BS Computer Engineering, Electrical Engineering, or Computer Science with 10+ years of verification and firmware and software development experience (or MS/PhD with 5+ years experience).
• Experience with System Verilog, UVM.
• Experience with writing a detailed test plan and building a sophisticated, directed, random-verification environment.
• Experience with scripting language such as Python or Perl and EDA Verification tools.
• Experience with Object-Oriented Design and implementation.
• Good understanding of Linux O.S.
• Good programming skills desired, especially C++ and ARM assembly.
• Understanding of networking protocols, a plus.

Other Skills:

• Diligent, detail-oriented, and willing to take initiative and handle assignments with minimal supervision.
• Requires the ability to accept and work with differing opinions.
• Cannot be a close-minded developer.
• Must be able to learn on the fly and work in a fast-paced environment. Expected Base Pay Range (USD) 158,600
• 237,600, $ per annum The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.

The expected base pay range for this role may be modified based on market conditions. Additional Compensation and Benefit Elements Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage

• from internship to retirement and through life's most important moments.

Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com. Interview Integrity To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews. These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process. This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment. #LI-JT2