ASIC/SoC Verification Engineer

Title:

ASIC/SoC Verification Engineer Location:

Palo Alto, CA (Or potentially Burlington, MA) Onsite Length of contract: 6 months+ (Temp-to-Perm)

Ideal Start Date:

6/1/2026

Responsibilities:

Lead verification for complex SoC subsystems using Python-based frameworks (Cocotb), with a focus on DSP validation, scalable test environments, and full verification closure through tapeout.

Must haves:

8+ years in ASIC/SoC digital verification Strong experience with Python-based verification (Cocotb preferred) Proficiency in SystemVerilog + RTL design concepts Experience building self-checking testbenches, scoreboards, and coverage models Proven track record of verification closure on large IP/SoC subsystems Strong debugging + regression/CI automation (GitHub or similar) Nice-to-Haves Experience with DSP / fixed-point or algorithm validation (Python models) Background in high-bandwidth or streaming data architectures Exposure to advanced node SoCs ( 28nm) Experience with embedded processors or accelerator subsystems