SoC UPF Methodology Engineer

Job Listing ID:

4472140

Job Title:

SoC UPF Methodology Engineer Application Deadline:

Open Until Filled

Job Location:

Beaverton

Date Posted:

04/14/2026

Hours Worked Per Week:

Not Provided Shift:

Not Provided Duration of Job:

Either Full or Part Time, more than 6 months You may contact this employer directly. (Obtain the contact information to print or add to your jobs.)

Job Summary:

Role Number:

200657087-0505 Summary Are you passionate about crafting solutions to intricate challenges? Join the Low Power groupat Silicon Technologies and contribute to the development of cutting-edge technology andcapabilities for low-power chip design. Your work will fuel Apple's next-generation chips!

You'll play a crucial role in exploring AI/ML to design the workflow for the next generation ofUPF. Additionally, you'll refine our existing UPF framework and ensure its seamless integrationand rigorous verification across our mobile products. You will be part of an exciting silicon design group that is responsible for designing state-of-the-art ASICs. We have an extraordinary opportunity for Power UPF Engineers, who will drive transistor level power ERC sign-off and power intent-UPF implementation & verification on mobile SOCs. Description In this role, your main objective will be to enhance our Unified Power Format (UPF)methodologies, refining power intent specification, execution, and validation to support state-of-the-art mobile SOCs. Key responsibilities encompass

• Enhancing power intent coverage via advanced static and dynamic verification techniques
• Developing tailored UPF solutions to align with unique project requirements
• Overseeing UPF deployment and sign-o? for frontend (FE) and place-and-route (P& R) stages
• Conducting thorough power intent assessments on custom circuitry
• Partnering with design and verification teams to troubleshoot and fix UPF-related workflowchallenges
• Integrating AI/ML technologies to optimize UPF processes and methodologies.

Minimum Qualifications A minimum of a bachelor's degree in relevant field and a minimum of 3 years of relevant industry experience Preferred Qualifications Expertise in UPF implementation and verification. Proficiency in scripting with languages like Python and Tcl. Understanding of CMOS power design principles. Experience applying AI/ML to coding and workflow optimization. Knowledge of multi-voltage static verification tools (e.g., VSILP/VCLP, CLP). Familiarity with the complete RTL-to-GDSII design flow. Strong communication abilities for e?ective collaboration across multidisciplinary teams. Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant (https://www.eeoc.gov/sites/default/files/2023-06/22-088_EEOC_KnowYourRights6.12ScreenRdr.pdf) .

Job Classification:

Electronics Engineers, Except Computer Access our statewide or regional occupation report for more information about wages, employment outlooks, skills, training programs, related occupations, and more. Compensation

Salary:

Not Provided Job Requirements

Experience Required:

 See Job Summary

Education Required:

None

Minimum Age:

N/A Gender:

N/A