CPU Verification Engineer

Job Listing ID:

4475745

Job Title:

CPU Verification Engineer Application Deadline:

Open Until Filled

Job Location:

Hillsboro

Date Posted:

04/18/2026

Hours Worked Per Week:

Not Provided Shift:

Not Provided Duration of Job:

Either Full or Part Time, more than 6 months You may contact this employer directly. (Obtain the contact information to print or add to your jobs.)

Job Summary:

Job Details:

Job Description:

Do Something Wonderful! Intel put Silicon in Silicon Valley. No one else is obsessed with engineering and has a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow. Who You Are We are seeking a highly motivated CPU verification engineer to join our design team. In this role, you will be responsible for driving and executing the functional correctness of CPU logic designs through rigorous pre-silicon verification methodologies.

Key Responsibilities:

Develop and execute comprehensive verification plans to validate CPU logic against architectural specifications. Build scalable UVM-based testbenches and define robust functional coverage models. Run system-level simulations to uncover design bugs and ensure functional integrity. Debug and root-cause issues in the pre-silicon environment; implement corrective actions to resolve test failures. Collaborate closely with CPU architect and RTL designers to verify complex architectural and microarchitectural features. Document verification strategies and lead technical reviews with design and architecture teams. Maintain and enhance existing verification infrastructure and methodologies. Contribute to the definition and refinement of CPU architecture and microarchitecture features.

Qualifications:

You must possess the minimum education requirements and minimum required qualifications to be initially considered for this position. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications The candidate must have a Bachelor's Degree in Electrical Electronics Engineering, Computer Engineering or in a STEM related field of study with 1+ years of relevant experience -OR- Master's Degree in Electrical Electronics Engineering, Computer Engineering or in a STEM related field of study 1+ years of experience developing SystemVerilog in UVM-based test-benches for reusable and scalable verification environments. 1+ years of experience in scripting language i.e. Python or Perl and C+ Preferred Qualifications PhD in Electrical Electronics Engineering, Computer Engineering or in a STEM related field of study with 2+ years of industry experience. Understanding of digital logic design, including instruction set execution, ALUs, control units, registers, memory, and system buses. Knowledge and experience with x86 preferred, strong ASM skills a bonus- Familiarity with version control software (GIT). Experience with Synopsys simulators. Experience with agile development methodologies. Excellent analytical and debugging skills, with a creative approach to problem-solving. Experience implementing validation strategies based on architectural and design feature changes. Use of AI agents in

Verification Job Type:

Experienced Hire Shift:

Shift 1 (United States of America)

Primary Location:

US, Texas, Austin Additional Locations:

US, Oregon, Hillsboro Business group: Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next genera...

Job Classification:

Computer Hardware Engineers Access our statewide or regional occupation report for more information about wages, employment outlooks, skills, training programs, related occupations, and more. Compensation

Salary:

Not Provided Job Requirements

Experience Required:

 See Job Summary

Education Required:

None

Minimum Age:

N/A Gender:

N/A