Senior ASIC Verification Engineer

Senior ASIC Verification Engineer This role has been designed as 'Hybrid' with an expectation that you will work on average 2 days per week from an HPE office.

Who We Are:

Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today's complex world. Our culture thrives on finding new and better ways to accelerate what's next. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good. If you are looking to stretch and grow your career our culture will embrace you. Open up opportunities with HPE.

Job Description:

Senior ASIC Verification Engineer Role Summary We are looking for a Senior ASIC Verification Engineer to verify complex networking ASICs at both block level and full‑chip level. This role involves creating testbenches using SystemVerilog and UVM, building high‑quality verification environments, writing directed and constrained‑random tests, debugging failures, and working closely with architecture, design, and emulation teams. The role also includes developing high‑performance C++/SystemC reference models and participating in emulation and post‑silicon validation. Responsibilities Verification Planning & Execution Develop verification plans for block‑level and full‑chip features based on architecture and design specifications. Build UVM‑based verification environments in SystemVerilog. Write constrained‑random tests, directed tests, and coverage‑driven tests. Drive functional coverage, code coverage, and closure of verification metrics. RTL Verification & Debug Run simulations, triage failures, and work closely with RTL designers to debug issues. Review micro‑architecture and RTL to identify corner cases and test gaps. Create checkers, scoreboards, assertions, and coverage models. Reference Model Development Develop high‑performance C++ and SystemC reference models for key datapath or control‑plane functions. Integrate reference models into simulation environments for accurate checking. Optimize models for simulation performance and scalability. Emulation & Post‑Silicon Develop test benches and test cases for emulation platforms (e.g., Palladium, Veloce, ZeBu). Work with emulation engineers to debug emulation failures and improve pre‑silicon quality. Support post‑silicon bring‑up, test execution, and bug root‑causing. Collaboration & Documentation Collaborate daily with architecture, RTL design, physical design, and firmware teams. Document verification plans, testbench architecture, and test results clearly. Mentor junior verification engineers and promote best practices. Required Skills and Experience Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, or related field. 8+ years of experience in ASIC or SoC verification. Strong hands‑on experience with SystemVerilog and UVM. Experience verifying networking ASICs (switching, routing, packet processing, or similar) is desired.

Solid understanding of:

Constrained‑random verification Directed and scenario‑based testing Coverage‑driven methodologies Assertions (SVA) Experience writing and optimizing C++ and/or SystemC reference models. Experience with emulation environments and post‑silicon debug. Familiarity with EDA tools for simulation, debug, coverage, waveform analysis, and formal checks. Strong problem‑solving skills and ability to debug complex design/testbench interactions. Excellent communication and teamwork skills.

Additional Skills:

Accountability, Accountability, Action Planning, Active Learning, Active Listening, Agile Methodology, Agile Scrum Development, Analytical Thinking, Bias, Coaching, Creativity, Critical Thinking, Cross-Functional Teamwork, Data Analysis Management, Data Collection Management (Inactive), Data Controls, Design, Design Thinking, Empathy, Follow-Through, Group Problem Solving, Growth Mindset, Intellectual Curiosity (Inactive), Long Term Planning, Managing Ambiguity {+ 5 more}

What We Can Offer You:

Health & Wellbeing We strive to provide our team members and their loved ones with a comprehensive suite of benefits that supports their physical, financial and emotional wellbeing. Personal & Professional Development We also invest in your career because the better you are, the better we all are. We have specific programs catered to helping you reach any career goals you have — whether you want to become a knowledge expert in your field or apply your skills to another division. Unconditional Inclusion We are unconditionally inclusive in the way we work and celebrate individual uniqueness. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good.

Let's Stay Connected:

Follow @HPECareers on Instagram to see the latest on people, culture and tech at HPE. #unitedstates

Job:

Engineering Job Level:

TCP_04 The expected salary/wage range for this position is provided below. Actual offer may vary from this range based upon geographic location, work experience, education/training, and/or skill level. -

United States of America:

Annual Salary

USD 135,000 - 310,500

in North Carolina The listed salary range reflects base salary. Variable incentives may also be offered. Information about employee benefits offered in the US can be found at https://myhperewards.com/main/new-hire-enrollment.html HPE is an Equal Employment Opportunity/ Veterans/Disabled/LGBT employer. We do not discriminate on the basis of race, gender, or any other protected category, and all decisions we make are made on the basis of qualifications, merit, and business need. Our goal is to be one global team that is representative of our customers, in an inclusive environment where we can continue to innovate and grow together.

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COVID-19

by the employment start date where permitted by law. Exemptions based on medical, religious or other grounds will be processed and approved in accordance with local laws. Standards of Business Conduct (SBC) The Hewlett Packard Enterprise Standards of Business Conduct (SBC) embody the fundamental principles that govern our ethical and legal obligations to Hewlett Packard Enterprise. They pertain not only to our conduct within the company but also to conduct involving our customers, channel partners, suppliers and competitors. Read more about how we win the right way. Equal Opportunity Employer (EEO) Hewlett Packard Enterprise provides equal employment opportunity to any employee or applicant without regard to sex, gender, color, race, ethnicity, religion, creed, national origin, ancestry, citizenship, age, marital status, sexual orientation, gender identity and expression, physical or mental disability, medical condition, pregnancy, protected veteran status, uniformed service status, familial status, genetic information, political affiliation, or any other characteristic protected by federal, state, or local law.

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Note:

This option is reserved for applicants needing assistance/reasonable accommodation related to a disability. Disclosure of Sensitive Personal Data Please ensure the resume you submit to us does not include any sensitive personal data. Sensitive personal data includes data revealing information about your racial or ethnic origin, political opinions, religious or philosophical beliefs, trade union membership, health, sex life or sexual orientation. To the extent the resume you submit does contain this type of personal data, you consent to the storing and processing of this data by HPE for the purpose of reviewing and managing your application.