Hardware Design and Integration Engineer

Hardware Design and Integration Engineer corporate_fare Google place Sunnyvale, CA, USA bar_chart Mid Mid Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area.

Minimum qualifications:

Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience. 2 years of experience in RTL design. Experience with digital design and microarchitecture design. Experience in design, optimizing for performance, power, and area. Experience with cross-functional engagement with Design Verification and Physical Design teams.

Preferred qualifications:

Master's degree or PhD in Electrical Engineering, Computer Engineering, or a related field. 4 years of RTL design experience. Experience with Linting, CDC, RDC, LEC. Experience with Scripting languages (i.e. Python or Perl). Experience architecting RTL solutions and experience with ASIC Synthesis flows. Experience with flow development and methodology improvements, and Integration experience. About the job The US base salary range for this full-time position is $138,000-$198,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can more about the specific salary range for your preferred location during the hiring process. Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about . Responsibilities Define and document the microarchitecture for digital designs within the TPU. Write high-quality, performant, and power-efficient Register Transfer Level (RTL) code, primarily in SystemVerilog. Collaborate with partner teams to support integration efforts and with the Verification team to develop test plans, debug RTL, and ensure functional correctness. Work closely with the Physical Design team to meet timing, area, power, and manufacturability requirements. Contribute to the development and enhancement of design tools, flows, and methodologies, and support post-silicon validation and debug efforts.