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Silicon Validation Engineer

Job

Microsoft

Mountain View, CA (In Person)

$159,640 Salary, Full-Time

Posted 2 weeks ago (Updated 1 week ago) • Actively hiring

Expires 7/12/2026

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Job Description

Silicon Validation Engineer (Contract) Please note that this is a contract role providing services to Microsoft through external staffing partners of Allegis Global Solutions. If you are selected for this role, you will be employed by AGS and will not be an employee of Microsoft.
Summary:
We are seeking a highly skilled and experienced engineer to join a dynamic team focused on supporting cutting-edge silicon development projects. This role is central to ensuring the quality and reliability of next-generation hardware by executing rigorous validation and testing activities within a lab environment. The ideal candidate brings deep technical expertise, a strong sense of ownership over test execution, and the ability to independently triage complex issues while delivering clear, insightful results summaries. This is an exciting opportunity to contribute directly to high-impact silicon projects from the ground up, working alongside cross-functional teams in a fast-paced, results-driven environment.
Job Responsibilities:
Run and maintain silicon system regressions in a lab environment Report results of silicon system regressions with meaningful insights and first-level failure analysis Triage issues using various debugging tools and techniques Review and validate system updates made by other teams Execute testing activities according to established plans and schedules Analyze log files to summarize results from test runs Help automate test runs to minimize downtime and improve efficiency Collaborate effectively with cross-functional teams to support hardware testing as new silicon arrives in the lab
Requirements:
8 to 10 years of relevant post-silicon validation testing experience required 6 to 10 years of experience in PCB board and socket debug and troubleshooting required 8 to 10 years of hands-on experience with Python, C, and C++ required Previous experience working in a lab-based hardware testing environment strongly preferred Bachelor's degree in Electronics and Communication Engineering, Computer Engineering, or a related engineering discipline required Expertise in Python, C, and C++ programming Knowledge of Verilog Strong post-silicon validation testing skills Experience with PCB board and socket debug and troubleshooting Strong attention to detail with analytical and problem-solving ability Ability to work independently with strong test execution ownership Result-oriented mindset with the ability to collaborate across cross-functional teams Ability to summarize test results with meaningful insights and perform first-level failure analysis
Additional Details:
Location:
Mountain View, CA (Onsite)
Duration:
12 months Pay Range•: $72 - $81.50 per hour
Weekly Schedule:
40 hours
Job Status:
Non-Exempt Application Deadline:
Apply within 72 hours of the posting date to ensure consideration. This role is eligible for the following benefits: Medical, dental & vision Hospital plans 401(k) Retirement Plan - Pre-tax and Roth post-tax contributions available Life Insurance (Company paid Basic Life and AD&D as well as voluntary Life & AD&D for the employee and dependents) Company paid short and long-term disability Health & Dependent Care Spending Accounts (HSA & DCFSA) Employee Assistance Program Time Off/Leave(PTO, Allegis Group Paid Family Leave, Parental Leave Benefits are subject to change and may be subject to specific elections, plan, or program terms. AGS is an Equal Opportunity Employer and will consider all applications without regard to race, sex, age, color, religion, national origin, veteran status, disability, sexual orientation, gender identity, genetic information or any characteristic protected by law. If you require a reasonable accommodation related to the application or interview process due to a disability, please email accommodation@allegisglobalsolutions.com . This inbox is monitored solely for accommodation requests. For questions about open roles or to apply, please submit your application through the job posting, as this inbox is not monitored by recruiters and applications sent here will not be reviewed. In accordance with the Immigration Reform and Control Act of 1986, employment is contingent upon verification of identity and authorization to work in the United States. All persons hired will be required to complete Form I-9 and provide acceptable documentation as required by law. Please note that we may use artificial intelligence (AI) tools to screen, assess, or select applicants for this position. These tools may analyze application materials and assist our team in identifying candidates whose qualifications best match the requirements of the role. If you have questions about our use of AI in the hiring process, or would like more information, please contact us. •We reserve the right to pay above or below the posted wage based on factors unrelated to protected classifications. Individual compensation offered for this position within this range will depend on many factors, including qualifications, skills, relevant experience, job knowledge, geographic location, internal equity, and other pertinent job-related factors.
San Francisco Candidates only:
Pursuant to the San Francisco Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records. City of Los Angeles Candidates only: We will consider for employment all qualified applicants, including those with criminal histories, in a manner consistent with the requirements of applicable state and local laws, including the City of Los Angeles' Fair Chance Initiative for Hiring.