RET - OPC Validation Engineer

Change the world. Love your job. We're at the forefront of an exciting era of semiconductor innovation at Texas Instruments' LFAB in Lehi, Utah home to our state-of-the-art 300mm manufacturing facility now ramping our most advanced 28nm analog and embedded process technology in the heart of the Silicon Slopes. As part of our Advanced Technology Development (ATD) organization, you won't just support production, you'll create the technology that makes it possible. From developing the Resolution Enhancement Techniques and OPC models that enable 28nm lithographic patterning, to engineering the precision wet process chemistries that define device performance at atomic scale, ATD engineers are solving the hardest problems in analog semiconductor development. At full production, our fabs will manufacture tens of millions of analog and embedded processing chips every day which are built on the process technologies you help create and qualify. We're committed to responsible, sustainable manufacturing and making a meaningful impact on the local community through job creation and substantial investments in

K-12 STEM

education. In this role, you'll work at the intersection of fundamental research and high-volume manufacturing, turning process innovations into production-ready technologies that power electronics everywhere. A flawed OPC recipe can silently degrade yield across thousands of wafers before the root cause is found. Preventing that is your mission. As an RET OPC Validation Engineer in TI's ATD organization, you are the data-driven quality safeguard between recipe development and production deployment. You'll architect and execute measurement-intensive validation strategies including combining SEM metrology, large-scale wafer data analysis, and tight coordination with Fab, Process Engineering, and Metrology teams in order to confirm OPC recipe quality before anything reaches production. You'll also build the data science infrastructure that makes validation faster and more reliable over time. Based at LFAB in Lehi with cross-site collaboration in Dallas, your work directly protects the yield ramp on TI's 28nm node. Responsibilities Validate the lithography quality of OPC recipes on specific designs: Finalize measurement plans with OPC engineers based on PFA failure reports and

PLRC/ORC

analysis Coordinate with Process Engineering, Process Integration, and Metrology teams to prepare wafers and execute efficient measurement flows Review large-scale datasets to determine Pass/Fail status and drive data integrity improvements for model release Analyze

PLRC/ORC/LMC

reports to identify and measure critical layout hotspots Facilitate OPC recipe release in collaboration with recipe engineers: Support OPC model data collection and manage DOE structures Improve SEM job creation and measurement flows through continuous process improvement Develop and implement data science tools to enhance validation accuracy and efficiency Minimum requirements: Masters in Electrical Engineering, Physics, Computer Science, Chemistry or related field 5 + years experience in a semiconductor photolithography and/or OPC development Experience with 28nm or advanced CMOS planar technology Python / data science proficiency Preferred qualifications: Strong lithography fundamentals and understanding of OPC model/recipe construction Experience with retarget rule setup and pattern matching

GDSII/OASIS

layout editing and creation Spotfire/JMP for data reporting; Jira experience