Front-End CAD and IP Management Engineer, Silicon

Front-End CAD and IP Management Engineer, Silicon corporate_fare Google place Mountain View, CA, USA bar_chart Mid Mid Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area.

Minimum qualifications:

Bachelor's degree in Electrical Engineering or a related field, or equivalent practical experience. 8 years of experience in Silicon IP qualification and delivery to design teams. Experience with Front-End CAD flow development and EDA tool collaterals. Experience scripting with Python, Tcl, or Perl.

Preferred qualifications:

Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science or a related field. Experience managing technical deliveries for internal and external customers in digital, analog, or mixed-signal environments. Experience developing and maintaining data dashboards for IP tracking. About the job Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. In this role, you will serve as the critical link between IP development and SoC integration. You will be responsible for defining and executing the qualification standards that ensure third-party and internal IPs are ready for high-performance silicon designs. You will be developing automated front-end CAD flows, managing complex EDA tool collaterals, and collaborating with cross-functional teams to resolve technical integration bottlenecks. By streamlining the delivery process through advanced scripting and dashboarding, you will directly enable the team to hit dynamic tape-out schedules with high-quality, reliable silicon. The US base salary range for this full-time position is $163,000-$237,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can more about the specific salary range for your preferred location during the hiring process. Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about . Responsibilities Lead the delivery of Silicon Internet Protocol (IP) to design teams to ensure high-quality integration. Develop and maintain Front-End CAD flows and Electronic Design Automation (EDA) tool collaterals to optimize design productivity. Collaborate with internal and external customers to resolve technical IP delivery issues. Automate manual processes and create data dashboards using scripting languages. Define IP qualification standards for digital, analog, and mixed-signal designs.