Validate and characterize DDR memory (such as DDR5 or LPDDR6) by working with electrical margining and signal integrity. Conduct timing analysis to guarantee seamless functionality under various operating conditions. Collaborate with teams across arm to develop the best validation practices. Develop and implement test plans and methodologies. Analyze test data to identify and resolve issues, ensuring world-class product performance. Successfully implement automation tools to improve testing efficiency. Provide detailed documentation and reports on characterization results and findings. Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent experience, with a GPA of 3.0 or higher. Strong foundation in electronics engineering with hands-on experience in DDR or LPDDR memory interface validation and characterization. Skilled in electrical margin and signal integrity measurements, encompassing eye diagrams, timing analysis, voltage margins, and DQ/DQS characterization. Experience using laboratory equipment such as high-bandwidth oscilloscopes, active probes, logic analyzers, signal generators, and power measurement instrumentation. Strong understanding of DDR protocols, memory training, timing relationships, and JEDEC specifications. Passion for innovation and implementing excellent silicon validation and characterization techniques. Strong knowledge of silicon processes concentrating on high-speed memory interfaces. Proven ability to excel in a fast-paced environment with outstanding time management and communication skills. Experience developing automation using Python or similar scripting languages. Skilled at building strong, positive relationships through collaboration, clear communication, and mutual respect. Effective at listening, evaluating diverse perspectives, and delivering impactful results.
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