Silicon Engineer, Digital Research, Quantum AI

Silicon Engineer, Digital Research, Quantum AI corporate_fare Google place Goleta, CA, USA ; Mountain View, CA, USA bar_chart Mid Mid Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area. info_outline

X Note:

By applying to this position you will have an opportunity to your preferred working location from the following: Goleta, CA, USA; Mountain View, CA, USA .

Minimum qualifications:

Bachelor's degree in Electrical Engineering, a related field or equivalent practical experience. 5 years of industry design experience. Experience in ASIC development (RTL to Physical Design) using Verilog or SystemVerilog. Experience with physical synthesis, timing closure, and industry toolchains (e.g., Synopsys Design Compiler/PrimeTime or Cadence Genus/Innovus). Experience in scripting for design automation using Python and Rust.

Preferred qualifications:

PhD in Electrical Engineering or a related field. 5 years of Individual Contributor (IC) design experience in bringing industrial design discipline and production-level accuracy to a research or prototyping environment. Experience integrating third-party IP (e.g., microprocessors or high-speed input/output) into custom digital design flows. Experience with Field Programmable Gate Array (FPGA) development. Experience in analog design principles or device physics. Knowledge of standard cell modeling and custom library development with excellent written and verbal communication skills to coordinate cross-functional team activity. About the job In this role, you will help bridge the gap between advanced research and scalable production design to help our team move toward producing more highly scaled systems. You will develop next-generation, scalable control systems that incorporate cryogenic electronics. The US base salary range for this full-time position is $163,000-$237,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can more about the specific salary range for your preferred location during the hiring process. Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about . Responsibilities Own the full implementation of digital systems, spanning front-end RTL development and back-end physical design (privacy and regulatory). Participate in the development of architectural requirements and technical specifications of digital sub-systems for both room temperature and cryogenic operation. Transition manual design processes into automated, industrial toolchains to support the goal of one million control channels. Develop documentation, solicit feedback on designs via design reviews at each critical phase of development, and describe results to the quantum team and, potentially, the greater research community. Support the development of cryogenic digital design models and deployment of technologies developed by the designer that are used throughout the organization.