Principal Quantum Engineer

CrossDisciplinary CoDesign:

Partner closely with fabrication, systems, packaging, and control teams to codesign QPUs, incorporating systemlevel constraints, process limitations, and scalability requirements.

Technical Authority & Partner Interface:

Serve as a technical interface and design authority for engagements with design, fabrication, and packaging partners.

Process & Workflow Optimization:

Apply integratedcircuit design principles and engineering best practices to continuously improve design workflows, decisionmaking rigor, and execution efficiency.

Foundry CoDevelopment:

Codevelop process assumptions, design rules, PDK extensions, and qualification strategies in close collaboration with fabrication partners. Apply AI to accelerate engineering and lab workflows. Design and build AI agents/copilots that assist with experiment setup, log triage, measurement report generation, protocol templating, and knowledge retrieval (e.g., instrument manuals, design docs). Doctorate in Physics, Engineering, or related field AND 3+ years experience in industry or in a research and development environment OR Master's Degree in Physics, Engineering, or related field AND 6+ years experience in industry or in a research and development environment. OR Bachelor's Degree in Physics, Engineering, or related field AND 8+ years experience in industry or in a research and development environment OR equivalent experience. Ability to leverage AI tools to drive innovation and efficiency (e.g., performance modeling and analysis, research gathering, day to day task automation). Familiarity with industry-standard or custom developed chip and circuit design/layout tools Demonstrated technical leadership on complex, multi-disciplinary hardware programs Experience with industrial semiconductor device design and fabrication processes and tools like process design kits and electronic design automation Hands-on experience engaging with foundries or semiconductor manufacturing partners Experience with IC or ASIC design flows (RTL-to-GDS, physical design, verification) Knowledge of quantum computing hardware platforms (superconducting, topological, or spin-based qubits)