FPGA Engineer - Junior Through Principal Positions Available!!!

Pay:

$40-$95+/hour. Can go higher for the right candidate

Position Overview:

We are seeking an experienced and technically capable FPGA Design Engineer to support advanced microelectronics development for high-performance defense and mission-critical systems. This position involves the design, implementation, verification, debugging, and integration of complex FPGA and digital hardware solutions. The ideal candidate will have hands-on experience with

FPGA/ASIC

development, strong proficiency in hardware description languages, and a solid understanding of digital circuit architecture and timing analysis. Candidates should be comfortable working in collaborative engineering environments, solving complex technical challenges, and contributing throughout the FPGA development lifecycle.

Key Responsibilities:

Design, develop, implement, and verify FPGA-based digital hardware solutions. Translate system-level requirements into FPGA architectures, detailed designs, and implementation plans. Develop and maintain RTL designs using VHDL, Verilog, and/or SystemVerilog. Perform synthesis, implementation, static timing analysis, timing optimization, and timing closure. Integrate FPGA designs into target hardware platforms and support system-level testing. Debug complex

FPGA/ASIC

design issues using simulation, development tools, and laboratory equipment. Participate in design reviews, verification activities, and technical documentation. Collaborate with hardware, software, systems, and verification engineering teams. Support configuration management, version control, and engineering change processes. Identify opportunities to improve FPGA development methodologies, tools, and workflows. Contribute to technical planning, design decisions, and engineering problem-solving.

Required Qualifications:

Active U.S. government-issued Final Secret Security Clearance or higher. Professional experience with FPGA development, ASIC front-end design, or closely related digital hardware engineering. Hands-on experience designing and implementing

FPGA/ASIC

logic using VHDL, Verilog, and/or SystemVerilog. Strong understanding of digital logic design, RTL development, and digital circuit architecture. Experience with FPGA design flows, including synthesis, implementation, simulation, and timing analysis. Familiarity with FPGA platforms such as AMD/Xilinx, Intel/Altera, or Microchip and associated development tools, including Vivado, Quartus, or Libero. Experience troubleshooting and debugging digital hardware and

FPGA/ASIC

designs. Understanding of timing constraints, resource utilization, and design optimization. Familiarity with version control systems such as Git or Subversion. Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related STEM discipline, or equivalent relevant technical experience. Strong analytical, problem-solving, documentation, and communication skills.

Preferred Qualifications:

Experience with high-speed digital interfaces such as PCIe, DDR, Ethernet, or similar protocols. Experience with advanced verification methodologies, including constrained-random verification, functional coverage, and SystemVerilog. Experience with FPGA hardware integration, board-level debugging, and laboratory validation. Familiarity with oscilloscopes, logic analyzers, and other digital hardware test equipment. Experience with MATLAB or Simulink for digital signal processing applications. Knowledge of DSP algorithms, filtering, modulation, demodulation, or spectral analysis. Experience with scripting languages, Unix/Linux environments, C/C++, Python, or Perl. Experience working in aerospace, defense, embedded systems, or mission-critical hardware environments. Experience supporting technical design reviews, peer reviews, and engineering process improvements. Experience providing technical guidance or leadership on complex digital hardware projects. Equal Opportunity Employer/Veterans/Disabled Benefit offerings include medical, dental, vision, term life insurance, short-term disability insurance, additional voluntary benefits, commuter benefits and 401K plan. Our program provides employees the flexibility to choose the type of coverage that meets their individual needs. Available paid leave may include Paid Sick Leave, where required by law; any other paid leave required by Federal, State or local law; and Holiday pay upon meeting eligibility criteria.

Disclaimer:

These benefit offerings do not apply to client-recruited jobs and jobs which are direct hire to a client To read our Candidate Privacy Information Statement, which explains how we will use your information, please visit https://www.entegee.com/candidate-privacy-information-statement/ The Company will consider qualified applicants with arrest and conviction records. #

GRPA Pay:

$40.00 - $95.00 per hour Expected hours: No less than 40.0 per week

Benefits:

401(k) Dental insurance Health insurance Vision insurance People with a criminal record are encouraged to apply Application Question(s): Do you have professional hands-on experience designing FPGA or ASIC digital logic using VHDL, Verilog, SystemVerilog, or similar tools?

Experience:

professional FPGA development or ASIC front-end design: 5 years (Preferred) Ability to

Commute:

Cedar Rapids, IA 52411 (Required)

Work Location:

In person