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Field Programmable Gate Array Engineer
Job Description
Must haves:
• Must have active secret clearance
• Must have some fpga design experience Qualifications You Must Have Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and minimum 5 years prior relevant experience or an Advanced Degree in a related field and minimum 3 years of experience. An active U.S. government issued Final Secret Security Clearance is required A minimum of 3 years professional experience in FPGA development, ASIC front end, or related areas Proficient in VHDL/Verilog for
FPGA/ASIC
design and implementation. Experience in digital circuit architecture, design, resource tradeoffs, timing analysis, and timing closure Familiarity with FPGA platforms such as AMD/Xilinx, Altera, Microchip, or others, and associated toolchains (e.g., Vivado, Quartus, Libero). Strong debugging and troubleshooting skills for
FPGA/ASIC
systems. Proficiency with revision control concepts and tools (e.g., Git, Subversion)
Pay:
$70.00 - $90.00 per hour
Work Location:
In person
Benefits
- Dental Insurance