Leads the design, development, verification, and integration of high-performance FPGA and ASIC-based digital systems for advanced defense applications, including hardware integration, design optimization, and technical project execution. Job Requirements Bachelor's degree in Science, Technology, Engineering, Mathematics (STEM), or a related field with a minimum of 8 years of relevant experience, or an advanced degree in a related field with a minimum of 5 years of relevant experience. Minimum of 5 years of professional experience in FPGA development, ASIC front-end design, or related disciplines. Proficiency in VHDL and/or Verilog for

FPGA/ASIC

design and implementation. Experience with digital circuit architecture, design optimization, resource tradeoff analysis, timing analysis, and timing closure. Familiarity with FPGA platforms, including AMD/Xilinx, Altera/Intel, or Microchip. Experience with FPGA development tools such as Vivado, Quartus, or Libero. Experience debugging and troubleshooting

FPGA/ASIC

designs and hardware integration issues. Proficiency with version control systems, including Git or Subversion. Experience with FPGA requirements development, design verification, and integration. Experience providing technical direction for

FPGA/ASIC

development activities. Preferred Skills Experience with high-speed digital interfaces and protocols, including DDR, PCIe, and Ethernet. Knowledge of chip-level verification methodologies, including constrained-random testing and functional coverage. Experience using SystemVerilog for

FPGA/ASIC

verification. Experience performing

FPGA/ASIC

laboratory validation using advanced electronic test equipment. Knowledge of Unix operating systems and scripting languages. Programming experience with C, C++, or Perl. Experience developing engineering estimates for technical proposals and new programs. Experience improving

FPGA/ASIC

design workflows, development tools, and verification methodologies. Familiarity with Agile development methodologies and engineering project planning. Experience with aerospace, defense electronics, or mission-critical embedded systems. Job Responsibilities Lead FPGA and ASIC design activities from requirements definition through implementation, verification, and hardware integration. Develop FPGA architectures and implement digital logic using VHDL and/or Verilog. Perform digital circuit architecture development, resource optimization, timing analysis, and timing closure. Integrate developed FPGA designs into target hardware units and embedded systems. Conduct functional verification, simulation, debugging, and hardware validation of

FPGA/ASIC

implementations. Troubleshoot design defects, timing violations, and hardware integration issues. Utilize FPGA development tools such as Vivado, Quartus, or Libero for design implementation and verification. Provide technical direction to engineering design teams, including task breakdown, development planning, and progress tracking. Develop engineering estimates and technical inputs for new program proposals and project pursuits. Review FPGA development artifacts, including HDL source code, simulation results, verification plans, and technical documentation. Participate in engineering design reviews, peer reviews, and certification analysis activities. Recommend and implement improvements to

FPGA/ASIC

development tools, design practices, and verification processes. Support FPGA laboratory testing, hardware integration, and system-level validation. Coordinate engineering activities to meet technical requirements, project milestones, and design objectives. Participate in Agile planning meetings and development activities. Maintain

FPGA/ASIC

design documentation, revision control records, and verification artifacts. Ensure compliance with established engineering development procedures, quality standards, and configuration management requirements.

Pay Details:

The Company will consider qualified applicants with arrest and conviction records in accordance with federal, state, and local laws and/or security clearance requirements, including, as applicable: The California Fair Chance Act Los Angeles City Fair Chance Ordinance Los Angeles County Fair Chance Ordinance for

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It is unlawful in Massachusetts to require or administer a lie detector test as a condition of employment or continued employment. An employer who violates this law shall be subject to criminal penalties and civil liability.