Senior FPGA Design Engineer (Hybrid-Owego, NY) (Owego, NY, 13827) | 09/28/26

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Share Job Job Description Senior FPGA Design Engineer (Hybrid-Owego, NY) We are looking for a Senior FPGA Design Engineer for a global aerospace company. In this role, you will Design, develop, verify, and integrate high-speed

FPGA/ASIC

solutions using SystemVerilog/Verilog, including DSP, SoC, embedded processors, and high-speed communication interfaces, while supporting simulation, debugging, and hardware validation. This is a 12-month contract (extensions likely), 40-hour-per-week (4-day 10-hour shifts per week) role, this is a Hybrid role in Owego, NY. This is a W-2 role as a Stage 4 Solutions employee. Health benefits and 401K are offered. Responsibilities You will be responsible for

ASIC & FPGA

development on R D program.

This engineer with have experience in developing, testing, and integrating digital signal processing (DSP), high speed digital design, high speed communication and system-on-chip (SOC) implemented on FPGA platforms.

Experience with COTS based control platforms and embedded processors on FPGA platforms. This person will help develop more affordable ways to automate and develop scripts to improve FPGA development efforts.

Cross discipline collaboration with Systems Architects, RF/Analog & Digital Circuit designers and

ASIC/FPGA

engineers to create leading edge products for future business growth, contributing to complex systems employing high speed networking concepts.

You will also provide support and technical direction to junior engineers. Overall contribution to design, simulation, verification, integration & test of complex, high speed products.

Requirements:

Must be a U.S. citizen and should be eligible to obtain clearance

Bachelor of Science or higher from an accredited college in Electrical Engineering or related discipline, or equivalent experience/combined education.

9+ years of experience as an FPGA Design engineer

Experience with FPGA design tools (Xilinx Vivado, Intel Quartus, Synopsys Synplify).

Proficient in SystemVerilog

Proficiency with HDL simulators, waveform viewers, and coverage tools.

Familiarity with hardware‑in‑the‑loop (HIL) test setups and test equipment (e.g., JTAG, logic analyzers).

Experience with version control systems and configuration management.

Desired Skills:

Proficient in UVM. Proficient in C.