Physical Design Engineer (Senior, Staff or Principal level) Physical IC Design Engineer (Senior, Staff or Principal level)

Locations :

San Jose, CA or Colorado Springs, CO (relocation offered) Compensation (base, bonus + stock): Senior Engineer up to $280-300k, Staff up to $400k, Principal up to $580k Introduction Join a high-impact semiconductor team developing advanced technologies that power next-generation AI, machine learning, cloud infrastructure, and large-scale data center environments. This is an opportunity to work on cutting-edge silicon products and play a key role in bringing complex chip designs from RTL through final tape-out. You will collaborate with experienced engineering teams and contribute to innovative solutions used in some of the world's most demanding computing environments. Top Reasons to Work With Us Work on advanced semiconductor products supporting AI, ML, networking, and data center applications Be part of a highly skilled engineering team tackling complex technical challenges Gain exposure to the full chip implementation flow from RTL through tape-out Contribute to industry-leading, high-performance silicon products Collaborate across multiple engineering disciplines in a fast-paced environment The Role/Responsibilities Drive physical implementation activities throughout the ASIC development lifecycle Perform RTL synthesis and support implementation flow setup Execute physical design, timing analysis, physical verification, and timing closure activities Own place-and-route tasks and support design convergence goals Perform EM/IR analysis and implement design optimizations as required Develop and optimize clock tree architectures, including skew balancing and insertion delay improvements Create and refine floorplans and physical layouts for complex designs Support methodology improvements, automation efforts, and design flow enhancements Work closely with RTL and design engineering teams to resolve implementation challenges Participate in silicon delivery activities through successful tape-out This is an onsite position and requires regular in-office attendance

Essential Skills/Qualifications:

BS or MS in EE or CE or similar Physical Design full cycle experience from RTL to tape-out Scripting - TCL and PERL Benefits Health, dental, and vision insurance Life and disability insurance FSA and HSA 401k with 6% match ESPP Flexible/Unlimited PTO Annual bonus from 15-30% (depending on your level) VERY generous stocks! Employer is willing to sponsor qualified candidates for a non-immigrant work visa. This job was first posted by CyberCoders on 10/16/2026 and applications will be accepted on an ongoing basis until the position is filled or closed. Everforth CyberCoders is proud to be an Equal Opportunity Employer All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, age, sexual orientation, gender identity or expression, national origin, ancestry, citizenship, genetic information, registered domestic partner status, marital status, status as a crime victim, disability, protected veteran status, or any other characteristic protected by law. Our hiring process includes AI screening for keywords and minimum qualifications, and a virtual recruiter as part of the application process. A human recruiter reviews all results. Click here for details on our virtual recruiter . Everforth CyberCoders will consider qualified applicants with criminal histories in a manner consistent with the requirements of applicable state and local law, including but not limited to the Los Angeles County Fair Chance Ordinance, the San Francisco Fair Chance Ordinance, and the California Fair Chance Act. Everforth CyberCoders is committed to working with and providing reasonable accommodation to individuals with physical and mental disabilities. Individuals needing special assistance or an accommodation while seeking employment can contact a member of our Human Resources team at Benefits@CyberCoders.com to make arrangements. Salary $130000 - $265000 USD per year #ENGT1