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Next Generation Middleware Enabler Engineer

Job

Astemo

Farmington Hills, MI (In Person)

Full-Time

Posted 6 days ago (Updated 4 days ago) • Actively hiring

Expires 7/1/2026

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Job Description

Next Generation Middleware Enabler Engineer Astemo - 3.3 Farmington Hills, MI Job Details 5 hours ago Qualifications Presentations for conferences or internal meetings Programming languages Automotive engineering Desktop applications Productivity software Systems analysis Full Job Description Position Overview and Objective Astemo's Advanced Development Division is hiring an Engineer II to develop next-generation middleware enablers that make AI functions safer, more robust, more observable, and easier to evolve on production vehicle platforms. The engineer will work across multiple areas as priorities evolve and is expected to contribute to both current development needs and emerging software infrastructure initiatives.
Job Responsibilities:
Design and develop advanced run-time middleware libraries that improve the safety, robustness, and observability of AI-based functions under real-world conditions. Develop orchestration, scheduling, and fallback approaches for AI workloads across heterogeneous compute resources, subject to real-time and power/thermal constraints. Build infrastructure and interfaces that enable safe in-vehicle evaluation of new AI models and richer signal exposure for downstream systems. Prototype concepts on embedded SoCs, benchmark them under realistic workloads, and perform system-level trade-off studies across compute, memory, timing, and power dimensions. Collaborate with cross-functional teams to define validation approaches and transition advanced work into the production stack.
Qualifications:
Strong programming proficiency in C/C++ (modern C++ preferred) and Python. Solid foundation in operating systems, concurrency, real-time constraints, and inter-process communication on Linux and/or RTOS environments. Working knowledge of automotive ECU hardware, sensors, peripheral interconnects, and System-on-Chip architectures. Familiarity with model behavior characteristics relevant to safety and robustness — uncertainty, calibration, distribution shift, failure modes. Strong debugging, profiling, and analysis skills using JTAG/trace tools, logging frameworks, and performance profilers. Flexibility and willingness to work across multiple software layers as project needs evolve. Effective communication and presentation skills, with NVIDIA Drive OS and toolchain experience a plus. Additionally, the ability to work independently with minimal direction is required as are strong verbal and written communication skills. Experience with PCs and application software, such as MS Office tools, is also required.
Education:
Master's or Ph.D. degree in
Computer Science or Electrical Engineering Experience:
Minimum of 3+ years with Masters in relevant industrial experience is required, or Ph.D. Job level is determined by various factors such as organization size, responsibility, career stage, and capabilities.
Supervisory Responsibilities:
n/a Working conditions:
Physical Demands:
Required to sit or stand for long periods of time. The employee may occasionally lift and/or move up to 25 pounds.
Travel:
Domestic and international may be required as needed. The candidate will occasionally need to travel to multiple global locations to support project development.