Module Development Engineer

Module Development Engineer in

Vernonia Job Ref:

3122359318

Employer:

Network Company Name:

INTEL

Industry:

Engineering

Job Type:

Full Time

State:

Oregon

City:

Vernonia

Zip Code:

97064

Salary:

172200.00 - 243000.00 USD Annual

Post Date:

06/14/2026 Job Description Drives technology development and enablement for both high volume manufacturing and future technology, provides process integration and equipment solutions, and performs feasibility studies to meet desired device specifications Leads design and development of technically sophisticated manufacturing processes and/or repair reverse engineering including material selection, parameter optimization, equipment metrology, and system design to enable new product designs and functional requirements Performs pathfinding activities in support of process and hardware development enabling manufacturing of innovative device architectures, and develops roadmaps for technologies enabling future roadmap Recommends and implements modifications for operating equipment to improve production efficiency, manufacturing techniques, and optimizing production output for existing products Partners with key equipment and materials suppliers to develop and implement enabling elements of the technology Performs process technology feasibility studies through theoretical simulations and/or practical engineering methods Remains updated on relevant industrial process and material manufacturing technical trends and develops view of inherent future Intel process technology needs to push industry forward by partnering with vendor ecosystem to build cost sensitive roadmap Qualifications Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

Minimum Qualifications:

PhD in Chemical Engineering, Materials Science, Physics, Electrical Engineering, or a semiconductor related STEM field with 4+ years of relevant experience OR Master's degree in Chemical Engineering, Materials Science, Physics, Electrical Engineering, or a semiconductor related STEM field with 6+ years of relevant experience OR Bachelor's degree in Chemical Engineering, Materials Science, Physics, Electrical Engineering, or a semiconductor related STEM field with 9+ years of relevant experience Relevant recent experience includes, but is not limited to: Hands-on experience in dry etch semiconductor manufacturing, including ownership of complex process development and optimization in a foundry or high volume manufacturing environment Strong command of plasma etch fundamentals, including plasma generation, plasma-surface interactions, selectivity, profile control, and defect mechanisms Demonstrated record of delivering dry etch process solutions that improved yield, reliability, performance, or manufacturability for advanced technology nodes Proven ability to lead technical problem solving across projects or sub modules, influencing peers and stakeholders without formal people management responsibility Expertise in statistical analysis and DOE methodologies, using tools such as JMP, Python, or MATLAB to drive data based decisions Experience working with and troubleshooting advanced semiconductor manufacturing equipment in a cleanroom environment

Preferred Qualifications:

5+ years of direct experience developing and deploying dry etch processes for advanced logic or foundry technologies, including technology node transitions or major process changes Experience with advanced dry etch technologies such as:

ICP / CCP

plasma etch o High aspect ratio etch (HARC) o Atomic Layer Etch (ALE) o Radical and Vapor phase isotropic etching o Ash and surface treatments o EUV patterned layer etch integration Demonstrated impact on cross module or integration level challenges, such as pattern fidelity, CD control, defectivity, variability reduction, or process window expansion Strong understanding of advanced device architectures (e.g., FinFET, GAA, nanosheet) and their etch integration requirements Experience with materials and device characterization techniques, including

SEM, TEM, CD

SEM, AFM, XPS, or electrical correlation Ability to define technical approaches, de risk options, and guide less senior engineers through complex problem solving Track record of effective collaboration with integration, lithography, device, yield, and equipment partner teams to deliver robust manufacturing solutions Evidence of broader technical influence, such as internal technology disclosures, patents, publications, or recognized subject matter expertise within the organization For information on Intel's immigration sponsorship guidelines, please see Intel U.S. Immigration Sponsorship Information Other Locations US, AZ, Phoenix; US, CA, Santa Clara Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here. Annual Salary Range for jobs which could be performed in the US $172,200.00-$243,000.00 Salary range dependent on a number of factors including location and experience Working Model This role will require an on-site presence. Job posting details (such as work model, location or time type) are subject to change.