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DFT / DFx Verification Engineer

Job

HyreU

Santa Clara, CA (In Person)

Full-Time

Posted 5 days ago (Updated 2 days ago) • Actively hiring

Expires 6/7/2026

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Job Description

Key Responsibilities:
Develop and execute verification plans for DFx features including: Scan (stuck-at, transition fault)
MBIST / LBIST
Boundary Scan (JTAG) Memory repair and redundancy Low-power test scenarios Create and maintain testbenches using SystemVerilog/UVM for DFx validation.
Verify:
Scan chain integrity and connectivity Test mode functionality and coverage ATPG pattern validation and debug BIST controllers and memory test logic
Technical Skills & Expertise:
Strong knowledge of DFT/DFx concepts : Scan, ATPG, MBIST, JTAG Digital design fundamentals Expertise in SystemVerilog & UVM Simulation tools: VCS, Xcelium, Questa Familiarity with ATPG tools: TetraMAX, Modus, FastScan Debug tools: Verdi, DVE Understanding of low-power design (UPF/CPF) , clocking, and reset strategies

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