Emulation Verification Engineer

Job Listing ID:

4471051

Job Title:

Emulation Verification Engineer Application Deadline:

Open Until Filled

Job Location:

Beaverton

Date Posted:

04/11/2026

Hours Worked Per Week:

Not Provided Shift:

Not Provided Duration of Job:

Either Full or Part Time, more than 6 months You may contact this employer directly. (Obtain the contact information to print or add to your jobs.)

Job Summary:

Role Number:

200657040-0505 Summary Imagine what you'll do at Apple! New insights have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what we could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it. At Apple, we're passionate about changing the world! We have a critical impact on getting high quality functional products to millions of customers quickly! We are looking for you to join our design verification team focusing on the creation, deployment, and support of sophisticated emulation environments. In this highly transparent role, you will be at the center of a chip design effort collaborating with Architecture, Design and SW teams! Description As a member of the Emulation verification team, we play a key role in using Emulation for verification of large SoCs. The overall work will involve porting the design onto the Palladium platform, followed by completing the detailed Emulation testplans.

• Collaborate closely with Architecture, Design, DV, Silicon Validation, Power and SW teams to bring up large SoCs on emulation platform
• Develop/apply synthesizable monitors/checkers, stimulus on emulation platform
• Prepare and complete the test plan and perform reviews with the multi-functional teams
• Perform low power testing on emulation platform
• Develop code for Design and verification that aids with emulation activities, using Verilog/System Verilog/UVM
• Develop random stimulus infrastructure by reusing existing UVM simulation constraints Minimum Qualifications Minimum of BS + 10 years relevant industry experience.

Preferred Qualifications Understanding of the tool flow from RTL to Emulation is a huge plus Good understanding of any Standard Emulator (Palladium, Veloce, Zebu) OR FPGA (Xilinx, Altera) flow Proven design verification skills Experience in writing Synthesize-able SystemVerilog/Verilog code and SystemVerilog assertions Experience with System Verilog verification environments including

C/C++ DPI, UVM

Experience with writing and debugging test FW Experience on any Scripting (Perl/Python/TCL) Excellent analytical and debug skills Experience in UVM Acceleration is plus. Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant (https://www.eeoc.gov/sites/default/files/2023-06/22-088_EEOC_KnowYourRights6.12ScreenRdr.pdf) .

Job Classification:

Computer Hardware Engineers Access our statewide or regional occupation report for more information about wages, employment outlooks, skills, training programs, related occupations, and more. Compensation

Salary:

Not Provided Job Requirements

Experience Required:

 See Job Summary

Education Required:

None

Minimum Age:

N/A Gender:

N/A