Consulting Engineer 3#26-02799 ALLENTOWN, PA Onsite Job Description

Description:

Request #: 192664-1

Job Title:

ASIC Verification Engineer Looking for how many contractors to fill this role?: 3

Duration:

8/24/2026 to 8/27/2027 Location? 100% onsite at

• office in either :

Allentown PA office or Carlsbad CA office Max bill rate: The bill rate ranges will be dependent on the candidate location and experience. Candidate will need to be 100% onsite at the

• Allentown, PA office of the
• Carlsbad CA office.
• PA location bill rate range for PA candidates:
• (based on location and years of experience)
• CA location bill rate range for CA candidates:
• (based on location and years of experience) Rounds of interview? 2 rounds for < 10 years ; 3 round for 12+ years.

•

Job Title:

ASIC Verification Engineer Location:

• (Allentown PA, Carlsbad CA) USA Job overview Join our innovative team developing next-generation silicon solutions for
• 's silicon one group.

We are seeking a collaborative Design Verification Engineer with 5-12 years of industry experience to help create cutting edge System-on-Chip (SoC) designs delivered first time right. You will work in a collaborative environment, participating in architectural decisions and verification strategies that directly impact product success. Our team values diverse perspectives and creative problem-solving approaches to deliver exceptional customer experiences. Key Job Responsibilities Develop and implement Universal Verification Methodology (UVM) based verification environments. Create comprehensive verification plans at both block and system levels. Design and implement verification components including assertions, traffic generators, agents, and scoreboards. Collaborate with cross-functional teams to evaluate design testability and verification requirements. Lead debug efforts and provide solutions for complex technical challenges. Basic Qualifications Bachelor's degree in Electrical Engineering or a related field. UVM Based testbench development. Experience in ASIC or SOC verification. Demonstrated experience in developing test plans and verification infrastructure. Practical knowledge of verification methodologies from block level to system level. Proficiency in System Verilog. Experience in identifying and resolving complex design and verification issues. Timing and gate level simulation experience. C coding for firmware delivery for post silicon bringup Preferred Qualifications Bachelors/master's degree in electrical or communications engineering or a related field. Experience with formal verification techniques including abstraction and end-to-end checking. Experience with industry-standard tools and scripting languages (Python or Perl) for automation. System Verilog coding and debug. AI based CAD efficiency improvisation initiatives High speed serial protocols preferred UCIe, PCIE etc Analog debug experience including DAC/Client & calibrations white-box verification. Contract position NDA/Restrictions 1. Contractor should not be restricted for a rollover in

• (RED to BLUE badge conversion) based on performance after a typical cool off period 2.

Candidates should have a valid immigration status ensuring minimum 12 months contract is not impacted due to immigration restrictions

Custom Fields:

Name:

Does this engagement give C-workers access to

• Controlled Technology?

Value:

No