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Hardware Engineer
West Menlo Park, CA
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Data Center Hardware / High-Speed Computing Job Overview We are looking for an experienced PCB Layout Engineer with strong hands-on expertise in Cadence Allegro PCB Designer and CAD tools to support the development of complex, high-density PCB designs for data center server boards. The ideal candidate will have experience designing high-speed digital, mixed-signal, and power PCBs involving advanced processors, SoCs, FPGAs, and high-speed memory interfaces. The candidate must be comfortable working with complex board layouts, HDI technology, constraint-driven design, and close collaboration with electrical and mechanical engineering teams. Key Responsibilities Own the end-to-end PCB layout process for complex, high-density server and computing boards. Perform high-speed digital layout for interfaces such as DDR4/DDR5, LPDDR5, HBM, PCIe Gen 5/6, and USB 3.2 or higher . Develop and maintain controlled-impedance routing, length matching, differential-pair routing, and crosstalk mitigation strategies. Create and enforce PCB layout design rules for high-speed digital, analog, mixed-signal, and power domains. Review schematics and provide layout-related feedback on component placement, power distribution, and signal routing. Collaborate with electrical and mechanical engineers to resolve board-outline, connector-placement, thermal, and stack-up constraints. Support PCB stack-up definition, HDI design, and blind/buried microvia implementation . Perform design reviews and ensure layouts meet signal-integrity, manufacturability, and reliability requirements. Work with PCB fabricators and contract manufacturers on DFM, DFA, and DFT requirements. Maintain and improve PCB footprints, component libraries, layer stack-up libraries, and PCB design standards. Provide net tracing, layout documentation, revision analysis, and prototype-to-production support. Ensure PCB layouts comply with applicable design rules and manufacturing requirements. Required Qualifications 8+ years of professional PCB layout and CAD experience. Advanced hands-on experience with Cadence Allegro PCB Designer . Cadence Allegro Layout version 23.1 or above is mandatory. Strong experience with high-density, high-speed PCB design. Hands-on experience with HDI technology, including blind and buried microvias . Experience with complex SoC, microprocessor, FPGA, or Intel-based board designs. Experience designing boards with DDR5/LPDDR5, PCIe Gen 5/6, high-speed memory, and complex power-delivery networks. Strong knowledge of Cadence Constraint Editor (CES) and constraint-driven PCB design. Knowledge of controlled impedance, signal integrity, differential pairs, timing constraints, and high-speed routing. Strong understanding of DFM, DFA, and DFT principles. Experience with 2D/3D CAD tools and mechanical design constraints. Strong communication, collaboration, and technical presentation skills. Preferred Qualifications Experience designing complex data center server, networking, or high-performance computing boards. Experience with Intel or other advanced SoC/microprocessor-based platforms. Experience supporting PCB designs from initial layout through prototype and production. Familiarity with PCB fabrication, assembly processes, and manufacturing yield improvement.