Signal Integrity Engineer PTEC Solutions Inc. San Jose, CA Job Details Full-time | Contract $100,000 - $115,000 a year 4 hours ago Benefits Health insurance Dental insurance 401(k) Qualifications CAD software MATLAB Teamwork Signal integrity testing Electrical engineering Electronics design Electrical engineering training Design engineering Oscilloscopes Simulation tools Linux Electrical Engineering Python Cross-functional communication Full Job Description We are looking for qualified candidates for a Signal Integrity Engineering opportunity supporting the development and validation of next-generation UCS servers. The work will involve Intel- and AMD-based blade servers as well as GPU-based AI systems.
Key Responsibilities:
Assist with system-level laboratory validation and analysis of high-speed digital and analog systems. Use scripting, programming, automation, and AI tools to support measurements, analysis, and post-processing of data. Manage lab equipment, including probes, oscilloscopes, terminations, and cables. Manage licensing and maintain simulation servers based on Windows or Linux systems. Support prototype function bring-up, system-level validation, and troubleshooting. Collaborate with hardware, layout, and validation teams to resolve technical issues. Contribute to documentation, data analysis, and correlation of simulation results with lab measurements. Participate in technical discussions with guidance from senior team members. Support signal integrity simulations using industry-standard tools.
Required Qualifications:
Bachelor's degree in Electrical Engineering or a related field. 3-5 years of relevant experience in signal integrity or hardware design. Experience with lab equipment such as oscilloscopes, TDR, or VNA is desirable. Experience with programming and scripting using Python or MATLAB. Strong teamwork and communication skills. Motivation to learn and solve technical challenges. Knowledge of transmission line theory and high-speed circuit fundamentals. Familiarity with design tools such as Cadence Allegro. Familiarity with simulation tools such as 2D/3D field solver tools, including HFSS and PowerSI, as well as SPICE.
Preferred Qualifications:
Coursework or project experience in signal integrity, power noise analysis, or related fields. Experience with high-speed DDR and PCIe links, NRZ and PAM4 SerDes, high-speed PCB/package development, and PI analysis. Familiarity with using or developing AI-based tools. Experience with HSPICE, ADS, MATLAB, Cadence PowerSI AC/DC, or Allegro. Exposure to high-speed interface technologies such as SerDes, LVDS, and CML.