Role:

PCB Layout Engineer Location:

Menlo Park (Onsite) Key Responsibilities Own end-to-end PCB layout for complex, high-density designs used in data center server boards Perform high-speed digital layout for interfaces like HBM,DDR4/5, PCIe Gen 5/6, USB 3.2 or higher, with attention to controlled impedance, length matching, and crosstalk mitigation Develop and enforce layout design rules for High-speed digital, analog, mixed-signal, and power domains within tightly constrained wearable form factors Collaborate with electrical engineers to review schematics and provide layout-driven feedback on component placement, power distribution network design, and signal routing strategies Partner with mechanical engineers to resolve physical constraints including board outline, connector placement, thermal management, and stack-up definition Drive design-for-manufacturability reviews with contract manufacturers and PCB fabricators to ensure layouts meet yield and reliability targets Maintain and improve PCB design standards, layer stack-up libraries, and footprint libraries to support scalable development across multiple hardware programs Support by providing layout documentation, net tracing support, and design revision analysis for prototype and production boards.

Pay:

From $50.00 per hour Expected hours: 40.0 per week

Work Location:

In person