Principal Data Plane Engineer Xsight Labs Durham, NC Job Details 3 hours ago Qualifications Performance tuning Software engineering System performance optimization Collaboration with product development teams C Computer hardware Embedded software Design engineering Linux System tuning Debugging Full Job Description About the Role We are looking for a Principal Dataplane Engineer to join our Xsight Labs US software engineering team. In this role, you will be a technical lead for a strategic networking initiative focused on extracting maximum performance from Xsight's next-generation silicon. You will design, implement, and optimize dataplane software that interfaces directly with custom hardware pipelines, enabling line-rate packet processing, advanced offloads, and scalable cloud networking features. As part of this effort, you will work closely with silicon architects, firmware, and control-plane teams, and actively engage with the open-source community to help define and influence dataplane models, APIs, and performance frameworks. Location is flexible between Xsight's East Coast offices in Billerica, Massachusetts or Durham, North Carolina. t is used for creating requisitions 'from scratch'

Requirements:

Required Experience Strong understanding of dataplane architectures and high-performance packet processing. Experience developing Linux-based dataplane software targeting embedded or server-class CPUs (x86 and/or ARM). Expertise in designing low-latency, high-throughput systems with strict performance constraints. Ability to translate hardware specifications and networking requirements into efficient, testable dataplane implementations. Experience profiling, debugging, and optimizing dataplane code across CPU, memory, and I/O subsystems. Proven ability to collaborate closely with hardware, firmware, and control-plane teams.

Desired Experience:

Hands-on experience with DPDK, including PMDs, RTE Flow, and performance tuning. Familiarity with NIC offloads, hardware accelerators, or programmable packet processing pipelines. Knowledge of L2/L3 forwarding, encapsulation, and tunneling protocols (Ethernet, VLAN, VXLAN, IP, TCP/UDP). Experience with highly available and scalable networking systems. Exposure to hardware/software co-simulation, emulation, or FPGA-based validation environments. Prior or active contributions to open source dataplane or networking projects. Required Skills Expert-level proficiency in C Performance-driven, detail-oriented engineering mindset Strong problem-solving and debugging skills Self-learner with the ability to ramp quickly on new hardware and architectures Team-player with excellent verbal and written communication skills Required experience: Required Experience Strong understanding of dataplane architectures and high-performance packet processing. Experience developing Linux-based dataplane software targeting embedded or server-class CPUs (x86 and/or ARM). Expertise in designing low-latency, high-throughput systems with strict performance constraints. Ability to translate hardware specifications and networking requirements into efficient, testable dataplane implementations. Experience profiling, debugging, and optimizing dataplane code across CPU, memory, and I/O subsystems. Proven ability to collaborate closely with hardware, firmware, and control-plane teams.

Desired Experience:

Hands-on experience with DPDK, including PMDs, RTE Flow, and performance tuning. Familiarity with NIC offloads, hardware accelerators, or programmable packet processing pipelines. Knowledge of L2/L3 forwarding, encapsulation, and tunneling protocols (Ethernet, VLAN, VXLAN, IP, TCP/UDP). Experience with highly available and scalable networking systems. Exposure to hardware/software co-simulation, emulation, or FPGA-based validation environments. Prior or active contributions to open source dataplane or networking projects. Required Skills Expert-level proficiency in C Performance-driven, detail-oriented engineering mindset Strong problem-solving and debugging skills Self-learner with the ability to ramp quickly on new hardware and architectures Team-player with excellent verbal and written communication skills