Engineering Design 1

Job Requirements Woodland Hills, CA Secret Polygraph Unspecified Career Level not specified Salary not specified Join Premium to unlock estimated salaries

Job Description Job Title:

Electrical Design Engineer 1

Location:

Woodland Hills, CA - 100%

Onsite Duration:

6-12 Month and Possible Extension Contract Clearance Required to

Start :

Active Secret Clearance to

Start Pay Rate :

$55 - $65/hr on W2 without benefits

Job Description:

•is looking for an Electrical Engineer Design 1 to support our Analog Electrical Engineering department. As a member of the Analog Electrical Engineering department, you'll get to perform analog circuit design and analysis to support the development of our new product. Design tasks include system level requirements analysis, subsystem level requirements development, detailed evaluation of circuits through design verification and characterization. Analysis tasks include circuit modeling, simulation and testing as well as signal and power integrity analyses on PCB design. This position will be served on-site at Woodland Hills, CA.

Responsibilities:

Researches, develops, designs, and tests electrical components, equipment, systems, and networks. Designs electronic equipment, products, and systems for military purposes.

Must Have Qualifications:

Understanding operational amplifier circuit topologies and behaviors Identify key characteristics of devices and optimize parameters based on requirement specifications Design and implement application specific signal conditioning and circuit filtering Experience in analog circuit design, modeling, and simulation using Cadence PSpice or Analog Devices LTspice Experience with schematic capture and PCB layout using Cadence Allegro, Siemens/Mentor Xpedition, or Altium Designer Experience with sub-system and circuit level testing and troubleshooting Experience with bench electronic testing tools such as oscilloscopes, arbitrary waveform function generators, logic analyzers, power supplies, spectrum analyzers, and multimeters Experience with Printed Circuit Board design using Cadence Allegro PCB Designer Experience with HyperLynx Signal and Power Integrity analyses Cadence PSpice circuit design, simulation, and analyses Experience in design verification and test EMI/EMC experience with troubleshooting and identifying solutions group id: artech Apply now