Job Summary We are seeking a dynamic and detail-oriented ASIC Physical Design Engineer to join our innovative team. In this role, you will be responsible for translating high-level system specifications into optimized physical implementations of Application-Specific Integrated Circuits (ASICs). Your expertise will drive the development of efficient, reliable, and high-performance chip layouts, ensuring seamless integration with complex systems such as SoCs (System on Chips) and FPGA (Field Programmable Gate Arrays). This position offers an exciting opportunity to contribute to cutting-edge technology projects in a fast-paced, collaborative environment. You will work closely with design engineers, verification teams, and manufacturing partners to deliver top-tier ASIC solutions that meet rigorous industry standards and compliance requirements. Here is an ASIC Physical Design role MUST be onsite in the Bay Area though if you can find candidates that are already there….

Spots:

Position 1:

Location:

Onsite, San Jose, CA Duration:

6-9+ Months (will extend)

Interview Process:

1 phone, 1 panel onsite 1 zoom

Skills/JD:

Physical Design engineer to own the entire block Floorplanning, PlacenRoute, Timing Closure DRC/LVS checks Low nm experience preferred Cadence tooling - They are using Innovus and Voltus mostly Synopsys tools for Timing Analysis I have summarized the job requirements below: Good understanding of Cadence tools (Innovous, Quantus, Voltus). Deep knowledge about industry standards in Physical Design, Physical aware synthesis, Floorplanning, CTS and place and route. Experience in developing and implementing Power-grid and high speed clock constraints and specifications. Good understanding of physical design verification methodology to debug LVS/DRC issues at the chip and block level. Experience with CDC, static timing analysis methodologies and relevant tools. Understanding and experience of mixed signal environments is a must. Join us to be part of a forward-thinking team dedicated to pushing the boundaries of technology. We value innovation, precision engineering, and continuous learning—empowering you to grow your skills while making a tangible impact on next-generation electronic systems.

Pay:

$88,308.23 - $106,349.70 per year

Work Location:

In person