Drive static timing analysis and timing convergence for multi-million-gate semiconductor designs on advanced process nodes. Develop constraints, timing models, closure strategies, ECOs, and automation flows; analyze violations across process corners and coordinate with Design and DFT teams through final signoff and tapeout. The summary above was generated by AI Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance

RISC-V CPU

from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is looking for a mid- to senior-level Physical Design Engineer with a strong background in static timing analysis (STA). In this role, you will help converge multi-million-gate designs on advanced process nodes and partner with cross-functional teams through final signoff and tapeout. This role is hybrid , based out of Austin, TX, Fort Collins, CO, or Santa Clara, CA . We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A physical design engineer with 8+ years of experience in STA, timing closure, and advanced-node design implementation. Experienced with timing flows, constraints, clocking, CDC, RDC, derates, uncertainties, guardbanding, and final signoff. Skilled in writing and debugging SDC constraints, creating ECOs, developing closure strategies, and analyzing worst-case corners. A strong collaborator and communicator who can drive results across distributed, cross-functional engineering teams. What We Need Drive timing convergence across blocks, partitions, sections, and top-level designs; generate and validate timing models and publish results. Analyze timing violations, develop and propagate fixes, debug timing-flow issues, and keep execution progressing through tapeout. Develop and validate bottom-up constraints while partnering with Design and DFT teams on methodology updates and closure requirements. Use Python, Perl, and Tcl for automation and flow development; experience with SPICE, PNR, placement, CTS, routing, post-route optimization, DFT, or AI-based automation is a plus. What You Will Learn How to develop scalable timing models, constraints, and closure strategies across multiple levels of design hierarchy. How clocking, guardbanding, derates, uncertainties, CDC, RDC, and process corners influence timing convergence. How timing, physical design, Design, and DFT methodologies come together to deliver successful tapeouts. How to improve implementation and signoff workflows through scripting, automation, flow development, and emerging AI-enabled solutions. Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This position requires access to technology that requires a U.S. export license for persons whose most recent country of citizenship or permanent residence is a

U.S. EAR

Country Groups D:

1, E1, or E2 country. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as

EAR Country Groups D:

1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded. Read Full Description Similar Jobs NVIDIA Senior Physical Design and Timing Engineer One Month Ago In-Office 136K-265K Annually Senior level 136K-265K Annually Senior level Artificial Intelligence

• Computer Vision
• Hardware
• Robotics
• Metaverse Drive physical design and timing for high-frequency, low-power CPUs/GPUs/SoCs from RTL to GDS2.

Perform synthesis, STA, timing constraint generation, timing convergence, placement/routing optimizations, ECO implementation, DFT closure, and cross-team methodology improvements to achieve timing and power targets.

Top Skills:

Buffering Cell Sizing Crosstalk Analysis Dft Eco Eda Tools Equivalence Checking Floorplanning Formal Verification (Fv) Gds2 Logic Restructuring Logic Synthesis Make Perl Placement Process Variation Modeling Python Routing Rtl Static Timing Analysis (Sta) Tcl Timing Constraints T-Mobile Principal Portfolio & Growth Strategy Manager 13 Minutes Ago In-Office 130K-282K Annually Expert/Leader 130K-282K Annually Expert/Leader Other

• Utilities Owns end-to-end product portfolio management, coordinating cross-functional teams, portfolio intake, prioritization, funding, resource allocation, delivery tracking, risk escalation, and executive reviews.

Analyzes portfolio performance and communicates insights to leadership and stakeholders through reports and visualizations. The role supports strategic decisions, value realization, organizational alignment, and delivery across business and technical teams. Comcast Enterprise Account Executive 50 Minutes Ago Hybrid Senior level Senior level Digital Media

• Information Technology
• News + Entertainment Sell Comcast Business internet, video, and voice solutions to mid-size and large businesses.

Develop territory, generate leads, deliver in-person sales presentations, build customer relationships for retention, maintain sales records and reports, and leverage networking and voice/data technology knowledge to position Comcast offerings. Requires regular field meetings and flexible schedule.

Top Skills:

Business Continuity Customer Premise Equipment (Cpe) Disaster Recovery Dsx E-Rate Contracting Processes Ethernet Lan Man Networking Protocols (Layers 1/2/3) Oc-X Voip Vpn Wan Wdm What you need to know about the Colorado Tech Scene With a business-friendly climate and research universities like CU Boulder and Colorado State, Colorado has made a name for itself as a startup ecosystem. The state boasts a skilled workforce and high quality of life thanks to its affordable housing, vibrant cultural scene and unparalleled opportunities for outdoor recreation. Colorado is also home to the National Renewable Energy Laboratory, helping cement its status as a hub for renewable energy innovation.

Key Facts About Colorado Tech Number of Tech Workers:

260,000; 8.5% of overall workforce (2024 CompTIA survey)

Major Tech Employers:

Lockheed Martin, Century Link, Comcast, BAE Systems, Level 3

Key Industries:

Software , artificial intelligence , aerospace , e-commerce , fintech , healthtech

Funding Landscape:

$4.9 billion in VC funding in 2024 (Pitchbook)

Notable Investors:

Access Venture Partners, Ridgeline Ventures, Techstars, Blackhorn Ventures Research Centers and Universities:

Colorado School of Mines, University of Colorado Boulder, University of Denver, Colorado State University, Mesa Laboratory, Space Science Institute, National Center for Atmospheric Research, National Renewable Energy Laboratory, Gottlieb Institute