Develop and scale system-level test frameworks for AI silicon in high-volume manufacturing. Build test wrappers, harnesses, abstraction layers, telemetry, logging, failure signatures, and automated triage. Integrate functional, stress, and diagnostic tests while debugging issues across hardware, firmware, drivers, operating systems, and test equipment. Collaborate with validation, manufacturing, product engineering, and silicon teams to establish reliable execution, pass/fail criteria, and data standards for yield and RMA analysis. The summary above was generated by AI Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance

RISC-V CPU

from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is hiring a System-Level Test (SLT) Engineer to ensure our silicon behaves predictably when running real workloads in real systems. You'll build the software and system infrastructure that enables validation tests to operate reliably in manufacturing, while applying structured debug to separate hardware issues from software, interface, and environmental effects. This role is ideal for someone who understands how tests are constructed and how silicon responds under stress—and who can turn that insight into scalable, production-ready solutions. Candidates will be assessed for the appropriate level during the interview process, and the offer level may differ from the level listed in this posting. This role is hybrid, based out of Austin,TX; Santa Clara,CA; or Fort Collins, CO . We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You bring 10+ years of experience in system-level test, embedded systems, software architecture, or hardware/software integration, with strong skills in C/C++, Python, or similar languages. You apply object-oriented design principles to build modular, maintainable, and extensible test frameworks, including execution wrappers, harnesses, and abstraction layers. You can control test equipment and automate handlers or external instruments through standard communication protocols, while debugging across test hardware, Linux hosts, firmware, drivers, and operating systems. You collaborate effectively across validation, firmware, silicon debug, product engineering, manufacturing, and OSAT/fab teams; experience with JTAG, boundary scan, DFT, high-volume manufacturing, NPI, Git, or CI/CD is a plus. What We Need Develop the test execution framework that hosts validation-provided tests in SLT environments deployed to OSAT production. Build wrappers, harnesses, and abstraction layers that run validation content unmodified while providing deterministic execution, dependency management, configuration control, and structured error handling. Integrate functional, stress, and diagnostic tests into SLT platforms; adapt them for high-volume manufacturing with stable execution and clear pass/fail criteria. Create logging, telemetry, failure-signature, and automated-triage capabilities; drive cross-domain issues to the right teams and define data standards for yield analysis and RMA investigations. What You Will Learn Architect SLT software and system infrastructure that connects validation content to high-volume manufacturing at a fast-scaling AI hardware company. Build deep cross-domain debug skills by tracing failures across silicon, boards, firmware, operating systems, drivers, and test content. Develop expertise in test orchestration, telemetry, and automated triage systems that influence yield, RMA outcomes, and production ramp speed. Understand how SLT architecture decisions shape product quality, time-to-yield, and manufacturing scalability—and drive measurable impact from day one. Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as

EAR Country Groups D:

1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded. Read Full Description Similar Jobs Hewlett Packard Enterprise Project Manager 2 Minutes Ago Remote or Hybrid Fort Collins, CO, USA 93K-214K Annually Senior level 93K-214K Annually Senior level Artificial Intelligence

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