Imagine what you could at Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, smart people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it.

Are you passionate about changing the world? We have a critical impact on getting high quality functional products to millions of customers quickly. We are looking for you to join our emulation team focusing on the creation, deployment, and support of advanced emulation environments. In this highly visible role, you will be at the center of a chip design effort collaborating with all disciplines.

Are you ready to help us deliver the next groundbreaking Apple products?

DescriptionAs a member of Emulation verification team, you will play a key role in utilizing Emulation for verification of large Wireless SoCs. You will also be involved in the most cutting-edge technology of bringing in mixed signal models onto the Palladium platform. The overall work will involve porting the design onto the Palladium platform, followed by executing the detailed Emulation testplan.

Responsibilities:

Work closely with emulation team to bring up large Wireless SoCs along with their mixed signal components in emulation platformDevelop/utilize monitors and checkers on emulation platformPreparing and executing the test plan and performing reviews with the cross functional teamsCollaborating cross functionally with Design, Architecture, Power, Silicon Validation, Performance and SW TeamsDeveloping code for Design and verification that aids with emulation activities, using Verilog/System Verilog/UVMPreferred QualificationsExperience with bring up, debugging and verification in EmulationUnderstanding of the tool flow from RTL to EmulationGood understanding of any Standard Emulator (Palladium, Veloce, Zebu) OR FPGA (Xilinx, Altera) flowProven Design Verification or Silicon Validation skills Experience in writing Synthesize-able SystemVerilog/Verilog code and SystemVerilog assertionsExperience with System Verilog verification environments including C/C++ DPI, UVMExperience on any Scripting (Perl/Python/TCL)Excellent analytical and debug skillsHands on usage of Low Power methodologies (UPF based preferably)Experience in UVM AccelerationMinimum QualificationsBS and a minimum of 10 years relevant industry experienceExperience with System Verilog, Verilog or UVMExperience in creating test benches from scratch (Block and System Level)Experience in Regression Management and TriagingPay & BenefitsAt Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $175,000 and $308,500, and your base pay will depend on your skills, qualifications, experience, and location.

Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about

Apple BenefitsNote:

Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.