Design Verification Engineer - Quantum Computing (Onsite, Milpitas, CA) (Milpitas, CA, 95035) | 09/30/26

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Share Job Job Description Design Verification Engineer - Quantum Computing (Onsite, Milpitas, CA) We are looking for an experienced Design Verification Engineer for a leading Quantum Computing company. This is a great opportunity for an engineer who wants to work on revolutionary technology. This is a 3-month contract (conversion to FTE likely), 40 hour/week role. This is an onsite role at the client's offices in Milpitas, CA. This is a W-2 role as a Stage 4 Solutions employee. Health benefits and 401K are offered.

Responsibilities:

Verification planning and requirements traceability; testbench architecture and development; reusable verification IP; UVM components including BFMs, drivers, monitors, checkers, reference models, and scoreboards; SystemVerilog Assertions (SVA); constrained-random and directed testing; functional and code coverage analysis and closure; regression setup, CI, and automation; debugging RTL/design and testbench issues; and verification results analysis.

End-to-end ownership of verification, including reviewing requirements and design specifications; developing and maintaining verification plans, test specifications, and testbench documentation; identifying corner cases; defining verification and sign-off criteria; establishing coverage goals and metrics; developing positive, negative, error-injection, stress, and boundary-condition tests; executing regressions; triaging failures; driving defects through closure; achieving coverage closure; and providing clear verification status, coverage reports, regression results, and sign-off documentation.

Work closely with FPGA/RTL, firmware, architecture, and validation teams, maintain a high standard of quality and technical rigor, proactively identify verification risks, gaps, and dependencies, and deliver verification milestones against committed schedules.

Communicate verification status, risks, blockers, and schedule impacts clearly to the broader engineering team.

Requirements:

• 5+ years hardware design verification and test experience
• Strong hands-on experience with SystemVerilog/UVM and Xcelium
• Experience with Python/scripting, Git, Linux-based development environments, simulation/debug tools, CI infrastructure, and regression automation is highly desirable.

Experience verifying FPGA-based systems, high-speed interfaces and protocols such as multi-gigabit serial transceivers (GTY/GTH) (MUST), Ethernet, Aurora/GT link, LVDS, and high-speed streaming data paths, as well as control/status interfaces, synchronization/timing logic, clock/reset behavior, protocol compliance, or hardware/firmware interactions.

Strong debugging, problem-solving, documentation, communication, and collaboration skills

Ability to work independently, take ownership, and drive verification activities from requirements through final sign-off.

BS/MS in Electrical Engineering, Computer Engineering, or a related field.