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Google

Lead CPU Design Verification Engineer, Silicon

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What they do

A Verification Engineer is responsible for ensuring that a product meets its specifications and requirements. Designs methods to test products, identify bugs in software products, and communicates with cross-functional teams, ensuring product development procedures and outcomes meets regulations. Primary objective is to verify that the system functions correctly and reliably according to its design and intended purpose.

$139,186 / year median in Oregon

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Job Description

Lead CPU Design Verification Engineer, Silicon corporate_fare Google place Portland, OR, USA ; Poughkeepsie, NY, USA ; +3 more ; +2 more bar_chart Advanced Advanced Experience owning outcomes and decision making, solving ambiguous problems and influencing stakeholders; deep expertise in domain. info_outline
X Note:
By applying to this position you will have an opportunity to your preferred working location from the following: Portland, OR, USA; Poughkeepsie, NY, USA; Austin, TX, USA; Mountain View, CA, USA .
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 8 years of experience with verification methodologies and languages such as Universal Verification Methodology (UVM) and SystemVerilog. Experience with processor microarchitecture.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture. Experience in low-power design verification. Familiarity with ARM Instruction Set Architecture. Knowledge of general purpose operating systems such as Linux and Android. About the job Responsibilities Design verification for future CPU developments. Build functional verification infrastructure, the infrastructure will include unit, multi-unit, core, and subsystem level verification environments. Produce diagnostic code repositories that sufficiently enable production of quality CPU's. Verify and validate performance for both pre-silicon and post-silicon.