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Lead CPU Design Verification Engineer, Silicon

Job

Google

Portland, OR (In Person)

$235,000 Salary, Full-Time

Posted 1 week ago (Updated 16 hours ago) • Actively hiring

Expires 7/6/2026

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Job Description

Lead CPU Design Verification Engineer, Silicon corporate_fare Google place Portland, OR, USA ; Poughkeepsie, NY, USA ; +3 more ; +2 more bar_chart Advanced Advanced Experience owning outcomes and decision making, solving ambiguous problems and influencing stakeholders; deep expertise in domain. info_outline
X Note:
By applying to this position you will have an opportunity to your preferred working location from the following: Portland, OR, USA; Poughkeepsie, NY, USA; Austin, TX, USA; Mountain View, CA, USA .
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 8 years of experience with verification methodologies and languages such as Universal Verification Methodology (UVM) and SystemVerilog. Experience with processor microarchitecture.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture. Experience in low-power design verification. Familiarity with ARM Instruction Set Architecture. Knowledge of general purpose operating systems such as Linux and Android. About the job The US base salary range for this full-time position is $192,000-$278,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can more about the specific salary range for your preferred location during the hiring process. Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about . Responsibilities Design verification for future CPU developments. Build functional verification infrastructure, the infrastructure will include unit, multi-unit, core, and subsystem level verification environments. Produce diagnostic code repositories that sufficiently enable production of quality CPU's. Verify and validate performance for both pre-silicon and post-silicon.