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Senior CPU Power Delivery Engineer
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MediaTek Inc.
Austin, TX (In Person)
$203,450 Salary, Full-Time
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Job Description
Senior CPU Power Delivery Engineer Apply Save Job Category Chip Design Location Austin, TX Experience More than 6 Years Work Expe. Education Bachelor's Degree Job Description MediaTek is a global fabless semiconductor industry leader, providing solutions from the edge to the cloud and powering over 2 billion connected devices every year. Established in 1997, our leading-edge technologies keep the world connected and enhance everyday life. At the forefront of innovation, MediaTek drives advancements in transformative technologies such as AI, 5G/6G, and Wi-Fi 8. Our high-performance, power-efficient solutions form the foundation for a smarter, more connected world, enabling devices from smartphones, smart homes, and AI PCs to high-performance computing, automotive, and AI data centers. As a trusted partner to the world's leading brands, we are committed to ensuring access to world-class technology for everyone. Our dedication to accelerating AI underscores our mission to enrich the future of humanity. About the Role We are looking for a Senior CPU Power Delivery Engineer to join our CPU subsystem team. You will own the end-to-end power delivery architecture for high-performance mobile and compute SoCs — from PDN design and analysis through silicon bring-up and characterization. Responsibilities
- Design and analyze power delivery networks (PDN) for CPU clusters (including big/mid/little core configurations) across advanced process nodes (5nm, 4nm, 3nm)
- Develop PDN impedance models and perform frequency-domain and time-domain simulations to meet target noise margins
- Define power grid architecture, decap strategy, and bump/pin assignment in collaboration with package and board teams
- Perform IR drop and dynamic voltage droop analysis using tools such as Apache Redhawk, Voltus, or equivalent
- Work closely with CPU microarchitecture and physical design teams to optimize power gating, DVFS operating points, and voltage domains
- Characterize silicon power behavior during bring-up; correlate simulation results with measured data
- Define and drive power delivery specifications for package, board, and PMIC/VR selection
- Contribute to design rule development and sign-off criteria for power integrity Main Requirements and Qualifications
- BS/MS/PhD in Electrical Engineering or related field
- 5+ years of experience in power delivery or power integrity engineering for high-performance digital ICs
- Hands-on experience with PDN simulation tools (Redhawk, Voltus, SIwave, or similar)
- Solid understanding of CPU microarchitecture power behavior, power gating, and DVFS
- Experience with advanced-node physical design flows (7nm and below)
- Familiarity with package and PCB co-design for power delivery Preferred Qualifications
- Experience with
ARM CPU IP
(Cortex-A or custom cores) power delivery- Knowledge of PMIC/voltage regulator characteristics and control loop interaction with on-die PDN
- Silicon bring-up and lab measurement experience (oscilloscope, VNA, PDN analyzer)
- Prior work on mobile SoC or high-performance compute platforms
- Publications or patents in power integrity or related areas Salary range: $152,400 - $254,500 annually.