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Senior Principal Design Engineer- Memory IP

Job

Cadence Design Systems, Inc.

San Jose, CA (In Person)

$220,000 Salary, Full-Time

Posted 1 day ago (Updated 3 hours ago) • Actively hiring

Expires 6/5/2026

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Job Description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Job Description Key Responsibilities:
+
  • Take ownership of the architecture and micro-architecture design for high-performance memory interface IPs, including DDR, LPDDR, and GDDR. This involves developing and implementing RTL code for digital logic, managing RTL integration, and synthesizing and optimizing designs to improve timing and PPA (Power, Performance, and Area). +
  • Collaborate closely with the Analog design team to understand their requirements and ensure alignment throughout the design process. +
  • Partner with the verification team to analyze coverage reports, perform debugging as needed, and confirm that the design meets all specifications. +
  • Interface with the Physical Design team to support Static Timing Analysis, timing closure, and Place & Route activities, ensuring seamless integration across disciplines. +
  • Work with the validation team to provide support during silicon bring-up, helping to resolve issues and validate functionality.
Position Requirements:
+
  • Demonstrated proficiency in logic design and micro-architecture, with hands-on experience using Verilog/SystemVerilog and simulation environments. +
  • Strong understanding of integrated circuit (IC) design principles, especially those related to high speed and low power. +
  • Minimum of three years' experience working on digital IC development projects, with proven ability to lead and contribute effectively within a collaborative team environment. +
  • Excellent communication skills, both verbal and written, are essential for success in this role. +
  • BS degree with at least 5 years of relevant experience or MS degree with at least 3 years of applicable experience in electrical engineering, microelectronics, engineering science, or solid state physics. +
  • Ability to communicate clearly in English is required. +
  • Familiarity with JEDEC-DDR and DFI protocols and prior memory IP design experience are advantageous, though not strictly required.
The annual salary range for California is $154,000 to $286,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location.
Our benefits programs include:
paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more. We're doing work that matters. Help us solve what others can't. Additional Jobs (https://cadence.wd1.myworkdayjobs.com/addl\_jobs)
Equal Employment Opportunity Policy:
Cadence is committed to equal employment opportunity throughout all levels of the organization. + Read the policy(opens in a new tab) (https://www.cadence.com/content/dam/cadence-www/global/en\_US/documents/company/careers/equal-employment-opportunity-policy.pdf) We welcome your interest in the company and want to make sure our job site is accessible to all. If you experience difficulty using this site or to request a reasonable accommodation, please contact staffing@cadence.com.
Privacy Policy:
Job Applicant If you are a job seeker creating a profile using our careers website, please see the privacy policy(opens in a new tab) (https://www.cadence.com/en\_US/home/privacy/privacy-policy.html) . E-Verify Cadence participates in the E-Verify program in certain U.S. locations as required by law. Download More Information on E-Verify (64K) (https://www.cadence.com/content/dam/cadence-www/global/en\_US/documents/company/careers/e-verify-participation-poster.pdf) Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences. Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world's toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence. Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class. Cadence is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.

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