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AI
Apple Inc.
Compiler Circuit Designer
Career Insights for Integrated Circuit (IC) Design Engineer
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What they do
An Integrated Circuit (IC) Design Engineer designs and develops integrated circuits used in electronic devices and communications systems. Designs circuitry and builds circuitry frameworks for products and systems.
$169,969 / year median in California
+2% projected growth
Job Description
Compiler Circuit Designer Santa Clara, California, United States Hardware Summary Posted:
Sep 02, 2026Role Number:
200681567-3760 As part of our Digital Design Engineering group, you'll take imaginative and revolutionary ideas and determine how to turn them into reality. You will apply engineering fundamentals and start from scratch if needed, bringing visionary ideas to the real world. Join us, and you'll help design the tools that allow us to bring customers experiences they've never before imagined. You will be part of an exciting silicon design group that is responsible for crafting innovative ASICs. We have an extraordinary opportunity for Compiler Circuit Design Engineers. This is a highly visible role at the heart of a processor design effort, making a critical impact delivering products to market quickly. Description Imagine yourself at the center of our hardware development effort. In this role, on memory compiler, you will collaborate with compiler vendors and design teams. You will have the opportunity to integrate and come-up with new ideas, as well as work with a team of dedicated engineers. You will work closely with compiler development and deployment to impact PPA of the end products. In this exciting role, you will perform the following:- Drive the development of SRAM, register files and latch arrays to enable high performance and low power design
- Have as comprehensive understanding of IC compilers that are available globally
- Lead the SRAM compiler IP requirements to Vendors and the internal IP teams
- Understand the complete spectrum of design flow, DFT and testing aspects of the compiler IPs
- Work with logic/architecture team to capture specifications of SRAM/Reg files/Latch arrays and drive the implementation.