Senior Debug Engineer - PCIe/CXL, RAS, Memory Advanced Micro Devices, Inc - 3.8 Bellevue, WA Job Details 4 hours ago Qualifications Systems engineering

Full Job Description Overview:

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believe technology has the power to solve the world's most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. Whether you're designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we'll advance your career.

Responsibilities:

Senior Server Systems Debug Engineer

THE ROLE

We are looking for a dynamic, energetic and Experienced Systems Debug Engineer to join our Server Customer Engineering team. As a key contributor to the success of AMD's product, you will be part of a leading team to drive customer issues to closure and deliver the highest quality, industry leading technologies to customers. The Systems Debug Engineering team fosters and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.

THE PERSON

As a Leader in Server Customer Debug Engineering, you will drive accurate, scalable, and complete solutions to customers. In this high visibility position, your silicon and system engineering expertise will be necessary towards customer enablement, debug and root cause resolution.

KEY RESPONSIBILITIES

Working on RAS, PCIe, Memory, MCA, CXL and Micro-Controller related failures with customers to get problems resolved Collaboration with AMD global teams to identify best solutions Providing validation and debug recommendations to customers for validation, new features and debug related questions Utilizing debug tools (e.g., debug scripts, protocol analyzers, SCAN and JTAG tools etc.) to narrow down and root cause customer failures Debugging issues found during the process, bring-up, validation, and production phases of SOC programs Engaging in other software/hardware/design teams Leading task force and collaborative approach with multiple teams

PREFERRED EXPERIENCE

10+ years of total experience inclusive of one or multiple of the following areas: RAS (reliability, availability and serviceability) validation and debug. PCIe/CXL functional and protocol (e.g. Gen1~Gen6) debug, including PCIe/CXL IP bring up, validation and analysis. Memory functional and protocol validation and/or debug. MCA/MCE (Machine check architecture and exception) validation and debug. Experience of post silicon validation methodologies Experience of developing programming languages such as Python scripts Experience of handling various high-speed test and measurement equipment such as protocol analyzer and scope Experience of X86 micro architecture Programming/scripting skills (e.g. Python, C++, Perl, Ruby etc). Debug techniques and methodologies

ACADEMIC CREDENTIALS

Bachelors or Masters degree in computer engineering/Electrical Engineering This role is not eligible for visa sponsorship. #LI-LM1 #

LI-HYBRID

Qualifications:

Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here. This posting is for an existing vacancy.