The candidate for this position will be expected and able to complete the following responsibilities: Plan the verification of complex design IP interacting with the architecture and design engineers to identify verification test scenarios. Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SVA and industry leading formal tools Develop tests using UVM or C/C++ Analyze and debug test failures with designers to deliver functionally correct design. Identify and write functional coverage for stimulus and corner cases. Close coverage to plug verification holes and meet tape out requirements. Collaborate with cross-functional teams, including Architecture, Design, Verification and FW to deliver products with key differentiators. Engage in chip bring-up activities and write test firmware to assist other teams. Drive innovation by enhancing validation efficiency through new methodologies and tools. Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience. This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate's citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable. Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR equivalent experience. Experience in executing pre-silicon verification of IPs/Sub Systems/SoCs through full cycle. Background in creating and debugging IP/SoC Level tests in

SV-UVM/C.

In depth knowledge of verification principles, testbenches and stimulus generation. Solid understanding of Silicon Design Architecture Scripting language such as Python, Ruby or Perl. Experience with the use of formal verification methods Experience with the use of AI tools to increase productivity Experience leading the verification of a design from architecture to freeze Experience integrating VIPs and working with vendors on support