Design Verification Engineer

Company DescriptionJoin a multibillion-dollar global company that brings together amazing technology, people, and operational scale to become a powerhouse in the memory industry. Headquartered in Rancho Cordova, California, Solidigm combines elements of an established, successful technology company with the spirit, agility, and entrepreneurial mindset of a start-up. In addition to the U.S. headquarters and other facilities in the U.S., the company has international presence in Asia, Europe, and the Americas. Solidigm will continue to lead the world in innovating new Memory technologies with aspirations to be the #1 NAND memory company in the world. At Solidigm, we view problems as opportunities to define innovative solutions that hold the power to change the world and unleash the potential technological needs that the future holds. At Solidigm, we are One Team that fosters a diverse, equitable, and inclusive culture that embraces individual uniqueness and empowers us to bring our best selves to deliver excellence in support of Solidigm's vision and mission to be the go-to partner for optimized data storage solutions. You can be part of the takeoff of an innovative business that develops cutting-edge products, delivers strong business value for customers, provides an engaging workplace for its employees, and serves a greater impact on the world. This is a golden opportunity for the right applicant to join us and help design, build, and lead Solidigm. We want a diverse team of dedicated professionals who will not just be Solidigm team members but contribute to how we shape the future of the organization. We are seeking applicants who will grow and thrive in our culture; be customer inspired, trusting, innovative, team-oriented, inclusive, results driven, collaborative, passionate, and flexible.

Job DescriptionComponent Design Engineers are responsible for the design and development of electronic components.

Responsibilities may include:

the design of chip layout circuit design, circuit checking, device evaluation and characterization, documentation of specifications, prototype construction and checkout, modification and evaluation of semiconductor devices and components, performing developmental and/or test work, reviewing product requirements and logic diagrams, planning and organizing design projects or phases of design projects. Responds to customer/client requests or events as they occur. Develops solutions to problems utilizing formal education and judgement.

Key responsibilitiesCreate/update test plan based on design specification and create UVM based direct/constrained-random tests.

Debug the simulation and quickly identify design or test issues.

Define functional coverage and perform coverage analysisCreate/update the SVAs (system-verilog assertions) for 3D NAND design based on verification requirements UVM based verification environment updates.

Mixed-signal fullchip modeling includes analog behavioral modeling, cell-level testbench, fullchip level mixed-signal netlist and testbench.Develop scripts to automate the verification flow and data-collections.

QualificationsMaster's degree with 3+ years experiences or bachelor degree with 5+ years experiences in electrical engineering, Computer Engineering, Computer SciencePrior experience in memory product pre-silicon verificationWorking experience in UVM, system Verilog assertions, Formal Property VerificationIn-depth knowledge of mixed-signal verification and working experience in mixed-signal design modeling and simulationFundamental digital and analog circuit design knowledge.

Solid data analysis capability, communication and presentation skillsStrong independent debugging and problem-solving skills Excellent written and verbal communication skillsAdditional InformationThe compensation range for this role is $121,280 - $194,100. Actual compensation is influenced by a variety of factors including but not limited to skills, experience, qualifications, and geographic location. Powered by SmartRecruiters - Candidate Privacy Policy