Skip to main content
Tallo logoTallo logo

Find Jobs

Find Jobs Near You – Available Work in Your Location

Skip to job details

Back to Results

Apply for this opportunity

To apply for this job, you'll continue to an external website or email application.

Sagarsoft

Senior Firmware Engineer

Career Insights for Firmware Engineer

See where this job fits in the broader career landscape. Knowing your career path helps you see what's possible from here.

Scorecard

Based on California data

Review key factors to help you decide if this role fits your goals. How is this calculated?

Were these scores useful?

What they do

A Firmware Engineer develops the programmable content in electronic hardware devices. Works for a hardware company developing software for each hardware platform. Alters, organizes and models the functionality of software for a variety of industries, including the automotive, health care and consumer electronics industries.

$150,711 / year median in California

-7% projected decline

Explore Career

Job Description

Title:

Senior Firmware Engineer(FTL)

Location:

Rancho Cordova, CA, 95742

Duration:
Fulltime Interview Mode:

Video

Experience (Years) - 8 (Min) - 15 (Max) Job Description Prioritized Must Have Skills for the Senior Firmware Engineer(FTL): 3+ years of experience in SSD controller and firmware architecture, including FTL development. Strong C/C++ programming and data structures experience in software/firmware development. Hands-on experience with FTL algorithms, including Garbage Collection, Wear Leveling, bad block management, metadata handling, and NAND error management. Hands-on experience with

JTAG/ICE

debugging and firmware debugging, validation, and root-cause analysis. Strong understanding of NAND flash and SSD technologies, including PCIe/NVMe or SATA protocols and power-loss protection/recovery. Responsibilities of the Senior Firmware Engineer(FTL): Design and Maintain FTL Architecture Develop and maintain the Flash Translation Layer (FTL), including I/O flow, Garbage Collection, and Wear Leveling algorithms to ensure data integrity and maximize NAND endurance. Block Management and Metadata Handling Implement bad block detection, isolation, and data migration mechanisms to manage block lifecycle. Design robust metadata structures to support fast mapping table reconstruction and system boot. Error Handling Mechanisms Prevent and mitigate NAND-related issues such as read disturb, program/erase failures, and retention loss. Implement RAID encode/decode flows to guarantee data reliability. Power-Loss Protection Design and implement power-loss protection algorithms to maintain data consistency and metadata integrity during unexpected shutdowns. Verify and optimize power-loss recovery flow to ensure fast and reliable system startup. Performance and Resource Optimization Optimize channel/die/plane access scheduling and parallelism to improve throughput and reduce latency. Enhance

DRAM/SRAM

usage efficiency and reduce Write Amplification for better endurance and performance. Debugging and Validation Develop and analyze FTL traces and logs for performance profiling and issue root-cause analysis. Conduct stress testing, mixed workload testing, power-fail tests, and corner-case verification to ensure firmware stability and reliability. Collaborate with Validation, Hardware, and ASIC teams to resolve cross-functional issues and ensure system robustness. Requirements of the Senior Firmware Engineer(FTL): Master s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field. At least 3 years of experience in software/firmware applications engineering. At least 3 years of experience with SSD controller/firmware architecture. Strong experience in C/C++ programming and data structures. Hands-on experience with

JTAG/ICE

debuggers. Experience with version control software such as Git. Ability to work independently as well as collaboratively within a small team. Must be willing to learn quickly and work effectively as a team player. Strong oral, written, and presentation skills for communication and documentation. Ability to work independently with minimal day-to-day supervision. Preferred Qualifications Experience operating logic analyzers, oscilloscopes, and bus protocol analyzers. Familiarity with SATA/PCIe (NVMe) protocols. Familiarity with NAND flash protocols. Linux system debugging experience. Fluency in reading and writing Mandarin preferred. Thanks Sam

Benefits

  • Dental Insurance