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TekClap

Signal Verification Engineer

Job Description

Signal Verification Engineer at TekClap Signal Verification Engineer at TekClap in Campbell, California Posted in about 14 hours ago.

Type:

full-time About the

Role:

We are seeking a highly motivated AMS/DMS Verification Engineer with expertise in mixed-signal verification, RF systems, and high-speed PHY technologies. In this role, you will work alongside Analog and RF Design Engineers to develop, verify, and validate next-generation wireless and connectivity solutions from design through silicon commercialization.

Key Responsibilities:

Collaborate with RF and Analog Design teams to develop and validate analog circuit models. Create and maintain AMS (Analog Mixed Signal) and DMS (Digital Mixed Signal) verification environments and testbenches. Develop verification solutions for wireless RF transceivers and high-speed PHY/SerDes designs. Perform simulation, debugging, and verification of mixed-signal systems. Analyze waveforms, identify design issues, and drive resolution in collaboration with cross-functional teams. Support silicon bring-up activities and contribute to successful product commercialization.

Required Qualifications:

Bachelor's degree in Electrical/Electronics Engineering or related field. 2+ years of experience in Mixed-Signal Verification, AMS/DMS, or Digital Design Verification. Strong understanding of Digital VLSI Simulation Flows . Solid knowledge of Mixed-Signal and Analog Simulation Methodologies . Hands-on experience with Verilog/SystemVerilog and Real Number Modeling (RNM) . Experience with UVM-based verification environments and digital verification methodologies. Strong waveform debugging and problem-solving skills. Excellent communication, collaboration, and interpersonal skills.

Preferred Qualifications:

Strong understanding of Wireless RF Transceiver Architectures . Experience with SerDes PHY Technologies and high-speed interface verification. Knowledge of semiconductor product development and silicon validation processes.

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What they do

A Verification Engineer is responsible for ensuring that a product meets its specifications and requirements. Designs methods to test products, identify bugs in software products, and communicates with cross-functional teams, ensuring product development procedures and outcomes meets regulations. Primary objective is to verify that the system functions correctly and reliably according to its design and intended purpose.

$158,679 / year median in California

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